derek.holloway
7502bf64a4
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649 lines
20 KiB
YAML
649 lines
20 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s
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---
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name: f32_olt
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_olt
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_LT_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(olt), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_oeq
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_oeq
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_EQ_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(oeq), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_ole
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_ole
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_LE_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(ole), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_ogt
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_ogt
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_GT_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(ogt), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_one
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_one
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_LG_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(one), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_oge
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_oge
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_GE_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(oge), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_ord
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_ord
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_O_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(ord), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_uno
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_uno
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_U_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(uno), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_ult
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_ult
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_NGE_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(ult), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_ueq
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_ueq
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_NLG_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(ueq), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_ule
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_ule
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_NGT_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(ule), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_ugt
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_ugt
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_NLE_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(ugt), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_une
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_une
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_NEQ_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(une), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f32_uge
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f32_uge
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_NLT_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_FCMP floatpred(uge), %0(s32), %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: f16_olt
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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; GFX1150-LABEL: name: f16_olt
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; GFX1150: liveins: $sgpr0, $sgpr1
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX1150-NEXT: S_CMP_LT_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
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; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s16) = G_TRUNC %0(s32)
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%2:sgpr(s32) = COPY $sgpr1
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%3:sgpr(s16) = G_TRUNC %2(s32)
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%4:sgpr(s32) = G_FCMP floatpred(olt), %1(s16), %3
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$sgpr0 = COPY %4(s32)
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...
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---
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name: f16_oeq
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legalized: true
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regBankSelected: true
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body: |
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bb.1.entry:
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liveins: $sgpr0, $sgpr1
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|
|
; GFX1150-LABEL: name: f16_oeq
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_EQ_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(oeq), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_ole
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_ole
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_LE_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(ole), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_ogt
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_ogt
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_GT_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(ogt), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_one
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_one
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_LG_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(one), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_oge
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_oge
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_GE_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(oge), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_ord
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_ord
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_O_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(ord), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_uno
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_uno
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_U_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(uno), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_ult
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_ult
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_NGE_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(ult), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_ueq
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_ueq
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_NLG_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(ueq), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_ule
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_ule
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_NGT_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(ule), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_ugt
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_ugt
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_NLE_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(ugt), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_une
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_une
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_NEQ_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(une), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|
|
---
|
|
name: f16_uge
|
|
legalized: true
|
|
regBankSelected: true
|
|
body: |
|
|
bb.1.entry:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX1150-LABEL: name: f16_uge
|
|
; GFX1150: liveins: $sgpr0, $sgpr1
|
|
; GFX1150-NEXT: {{ $}}
|
|
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
|
; GFX1150-NEXT: S_CMP_NLT_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
|
|
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
|
; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s16) = G_TRUNC %0(s32)
|
|
%2:sgpr(s32) = COPY $sgpr1
|
|
%3:sgpr(s16) = G_TRUNC %2(s32)
|
|
%4:sgpr(s32) = G_FCMP floatpred(uge), %1(s16), %3
|
|
$sgpr0 = COPY %4(s32)
|
|
|
|
...
|