derek.holloway
7502bf64a4
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212 lines
7.5 KiB
YAML
212 lines
7.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: ctlz_zero_poison_s32_s32
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: ctlz_zero_poison_s32_s32
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK-NEXT: [[CTLZ_ZERO_POISON:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_POISON [[COPY]](s32)
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; CHECK-NEXT: $vgpr0 = COPY [[CTLZ_ZERO_POISON]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_CTLZ_ZERO_POISON %0
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$vgpr0 = COPY %1
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...
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---
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name: ctlz_zero_poison_s32_s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: ctlz_zero_poison_s32_s64
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; CHECK: liveins: $vgpr0_vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: [[CTLZ_ZERO_POISON:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_POISON [[COPY]](s64)
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; CHECK-NEXT: $vgpr0 = COPY [[CTLZ_ZERO_POISON]](s32)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s32) = G_CTLZ_ZERO_POISON %0
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$vgpr0 = COPY %1
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...
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---
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name: ctlz_zero_poison_s64_s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: ctlz_zero_poison_s64_s64
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; CHECK: liveins: $vgpr0_vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: [[CTLZ_ZERO_POISON:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_POISON [[COPY]](s64)
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; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[CTLZ_ZERO_POISON]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s64) = G_CTLZ_ZERO_POISON %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: ctlz_zero_poison_s16_s32
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: ctlz_zero_poison_s16_s32
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK-NEXT: [[CTLZ_ZERO_POISON:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_POISON [[COPY]](s32)
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; CHECK-NEXT: $vgpr0 = COPY [[CTLZ_ZERO_POISON]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s16) = G_CTLZ_ZERO_POISON %0
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%2:_(s32) = G_ZEXT %1
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$vgpr0 = COPY %2
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...
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---
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name: ctlz_zero_poison_s16_s16
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: ctlz_zero_poison_s16_s16
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
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; CHECK-NEXT: [[AMDGPU_FFBH_U32_:%[0-9]+]]:_(s32) = G_AMDGPU_FFBH_U32 [[SHL]](s32)
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[AMDGPU_FFBH_U32_]], [[C1]]
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; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s16) = G_TRUNC %0
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%2:_(s16) = G_CTLZ_ZERO_POISON %1
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%3:_(s32) = G_ZEXT %2
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$vgpr0 = COPY %3
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...
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---
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name: ctlz_zero_poison_v2s32_v2s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: ctlz_zero_poison_v2s32_v2s32
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; CHECK: liveins: $vgpr0_vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; CHECK-NEXT: [[CTLZ_ZERO_POISON:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_POISON [[UV]](s32)
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; CHECK-NEXT: [[CTLZ_ZERO_POISON1:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_POISON [[UV1]](s32)
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; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[CTLZ_ZERO_POISON]](s32), [[CTLZ_ZERO_POISON1]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(<2 x s32>) = G_CTLZ_ZERO_POISON %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: ctlz_zero_poison_v2s32_v2s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-LABEL: name: ctlz_zero_poison_v2s32_v2s64
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
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; CHECK-NEXT: [[CTLZ_ZERO_POISON:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_POISON [[UV]](s64)
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; CHECK-NEXT: [[CTLZ_ZERO_POISON1:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_POISON [[UV1]](s64)
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; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[CTLZ_ZERO_POISON]](s32), [[CTLZ_ZERO_POISON1]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
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%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(<2 x s32>) = G_CTLZ_ZERO_POISON %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: ctlz_zero_poison_v2s16_v2s16
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: ctlz_zero_poison_v2s16_v2s16
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
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; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[BITCAST]], [[C]](s32)
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; CHECK-NEXT: [[AMDGPU_FFBH_U32_:%[0-9]+]]:_(s32) = G_AMDGPU_FFBH_U32 [[SHL]](s32)
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; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
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; CHECK-NEXT: [[AMDGPU_FFBH_U32_1:%[0-9]+]]:_(s32) = G_AMDGPU_FFBH_U32 [[SHL1]](s32)
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[AMDGPU_FFBH_U32_]], [[C1]]
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[AMDGPU_FFBH_U32_1]], [[C1]]
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; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32)
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; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL2]]
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; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
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; CHECK-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(<2 x s16>) = G_CTLZ_ZERO_POISON %0
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$vgpr0 = COPY %1
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...
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---
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name: ctlz_zero_poison_s7_s7
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: ctlz_zero_poison_s7_s7
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
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; CHECK-NEXT: [[AMDGPU_FFBH_U32_:%[0-9]+]]:_(s32) = G_AMDGPU_FFBH_U32 [[SHL]](s32)
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 127
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[AMDGPU_FFBH_U32_]], [[C1]]
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; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s7) = G_TRUNC %0
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%2:_(s7) = G_CTLZ_ZERO_POISON %1
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%3:_(s32) = G_ZEXT %2
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$vgpr0 = COPY %3
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...
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---
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name: ctlz_zero_poison_s33_s33
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: ctlz_zero_poison_s33_s33
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; CHECK: liveins: $vgpr0_vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s32)
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; CHECK-NEXT: [[CTLZ_ZERO_POISON:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_POISON [[SHL]](s64)
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; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[CTLZ_ZERO_POISON]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s33) = G_TRUNC %0
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%2:_(s33) = G_CTLZ_ZERO_POISON %1
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%3:_(s64) = G_ANYEXT %2
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$vgpr0_vgpr1 = COPY %3
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...
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