derek.holloway
7502bf64a4
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1984 lines
91 KiB
YAML
1984 lines
91 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_insert_s64_s32_offset0
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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; CHECK-LABEL: name: test_insert_s64_s32_offset0
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[UV1]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s32) = COPY $vgpr2
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%2:_(s64) = G_INSERT %0, %1, 0
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$vgpr0_vgpr1 = COPY %2
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...
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---
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name: test_insert_s64_s32_offset32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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; CHECK-LABEL: name: test_insert_s64_s32_offset32
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[COPY1]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s32) = COPY $vgpr2
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%2:_(s64) = G_INSERT %0, %1, 32
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$vgpr0_vgpr1 = COPY %2
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...
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---
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name: test_insert_s64_s32_offset16
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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; CHECK-LABEL: name: test_insert_s64_s32_offset16
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY1]](s32)
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[C]](s32)
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -281474976645121
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
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; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[SHL]]
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[OR]](s64)
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; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY2]](s64)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s32) = COPY $vgpr2
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%2:_(s64) = G_INSERT %0, %1, 16
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$vgpr0_vgpr1 = COPY %2
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...
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---
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name: test_insert_s96_s32_offset0
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
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; CHECK-LABEL: name: test_insert_s96_s32_offset0
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s96)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[COPY1]](s32), [[UV1]](s32), [[UV2]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)
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%0:_(s96) = COPY $vgpr0_vgpr1_vgpr2
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%1:_(s32) = COPY $vgpr3
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%2:_(s96) = G_INSERT %0, %1, 0
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$vgpr0_vgpr1_vgpr2 = COPY %2
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...
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---
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name: test_insert_s96_s32_offset32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
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; CHECK-LABEL: name: test_insert_s96_s32_offset32
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s96)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[UV]](s32), [[COPY1]](s32), [[UV2]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)
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%0:_(s96) = COPY $vgpr0_vgpr1_vgpr2
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%1:_(s32) = COPY $vgpr3
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%2:_(s96) = G_INSERT %0, %1, 32
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$vgpr0_vgpr1_vgpr2 = COPY %2
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...
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---
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name: test_insert_s96_s32_offset64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
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; CHECK-LABEL: name: test_insert_s96_s32_offset64
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s96)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32), [[COPY1]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)
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%0:_(s96) = COPY $vgpr0_vgpr1_vgpr2
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%1:_(s32) = COPY $vgpr3
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%2:_(s96) = G_INSERT %0, %1, 64
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$vgpr0_vgpr1_vgpr2 = COPY %2
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...
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---
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name: test_insert_s128_s32_offset0
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
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; CHECK-LABEL: name: test_insert_s128_s32_offset0
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY1]](s32), [[UV1]](s32), [[UV2]](s32), [[UV3]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
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%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(s32) = COPY $vgpr4
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%2:_(s128) = G_INSERT %0, %1, 0
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
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...
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---
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name: test_insert_s128_s32_offset32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
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; CHECK-LABEL: name: test_insert_s128_s32_offset32
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV]](s32), [[COPY1]](s32), [[UV2]](s32), [[UV3]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
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%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(s32) = COPY $vgpr4
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%2:_(s128) = G_INSERT %0, %1, 32
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
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...
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---
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name: test_insert_s128_s32_offset64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
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; CHECK-LABEL: name: test_insert_s128_s32_offset64
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32), [[COPY1]](s32), [[UV3]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
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%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(s32) = COPY $vgpr4
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%2:_(s128) = G_INSERT %0, %1, 64
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
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...
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---
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name: test_insert_s128_s32_offset96
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
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; CHECK-LABEL: name: test_insert_s128_s32_offset96
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[COPY1]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
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%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(s32) = COPY $vgpr4
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%2:_(s128) = G_INSERT %0, %1, 96
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
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...
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---
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name: test_insert_s128_s64_offset0
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
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; CHECK-LABEL: name: test_insert_s128_s64_offset0
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
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; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV4]](s32), [[UV5]](s32), [[UV2]](s32), [[UV3]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
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%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(s64) = COPY $vgpr4_vgpr5
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%2:_(s128) = G_INSERT %0, %1, 0
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
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...
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---
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name: test_insert_s128_s64_offset32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
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; CHECK-LABEL: name: test_insert_s128_s64_offset32
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
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; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV3]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
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%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(s64) = COPY $vgpr4_vgpr5
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%2:_(s128) = G_INSERT %0, %1, 32
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
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...
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---
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name: test_insert_s128_s64_offset64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
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; CHECK-LABEL: name: test_insert_s128_s64_offset64
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; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
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; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32), [[UV4]](s32), [[UV5]](s32)
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; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
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%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(s64) = COPY $vgpr4_vgpr5
|
|
%2:_(s128) = G_INSERT %0, %1, 64
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_s128_s96_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
|
|
; CHECK-LABEL: name: test_insert_s128_s96_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s96)
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV4]](s32), [[UV5]](s32), [[UV6]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
|
|
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s96) = COPY $vgpr4_vgpr5_vgpr6
|
|
%2:_(s128) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_s128_s96_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
|
|
; CHECK-LABEL: name: test_insert_s128_s96_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s96)
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV6]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
|
|
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s96) = COPY $vgpr4_vgpr5_vgpr6
|
|
%2:_(s128) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_p0_s32_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_p0_s32_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](p0)
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY1]](s32), [[UV1]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](p0)
|
|
%0:_(p0) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(p0) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_p0_s32_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_p0_s32_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](p0)
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[UV]](s32), [[COPY1]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](p0)
|
|
%0:_(p0) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(p0) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_s128_p0_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_s128_p0_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](p0)
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV4]](s32), [[UV5]](s32), [[UV2]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
|
|
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(p0) = COPY $vgpr4_vgpr5
|
|
%2:_(s128) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_s128_p0_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_s128_p0_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](p0)
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
|
|
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(p0) = COPY $vgpr4_vgpr5
|
|
%2:_(s128) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_s128_p0_offset64
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_s128_p0_offset64
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](p0)
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32), [[UV4]](s32), [[UV5]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)
|
|
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(p0) = COPY $vgpr4_vgpr5
|
|
%2:_(s128) = G_INSERT %0, %1, 64
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_s64_p3_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_s64_p3_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p3) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
|
|
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p3)
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[PTRTOINT]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)
|
|
%0:_(s64) = COPY $vgpr0_vgpr1
|
|
%1:_(p3) = COPY $vgpr2
|
|
%2:_(s64) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_s128_s16_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_s128_s16_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
|
|
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[DEF]](s32)
|
|
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[MV]], [[C]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF1]], [[C1]]
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -65536
|
|
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)
|
|
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C2]]
|
|
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C3]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND2]], [[AND]]
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND3]], [[AND1]]
|
|
; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[OR]](s64), [[OR1]](s64)
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s128) = COPY [[MV1]](s128)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY2]](s128)
|
|
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s32) = COPY $vgpr4
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s128) = G_INSERT %0, %2, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3
|
|
...
|
|
|
|
---
|
|
name: test_insert_s128_s16_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_s128_s16_offset16
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
|
|
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[DEF]](s32)
|
|
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[MV]], [[C]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF1]], [[C1]]
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND]], [[C2]](s32)
|
|
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[AND1]], [[C2]](s32)
|
|
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 48
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND]], [[C3]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]]
|
|
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 -4294901761
|
|
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)
|
|
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C4]]
|
|
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C5]]
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND2]], [[SHL]]
|
|
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[AND3]], [[OR]]
|
|
; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[OR1]](s64), [[OR2]](s64)
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s128) = COPY [[MV1]](s128)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY2]](s128)
|
|
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s32) = COPY $vgpr4
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s128) = G_INSERT %0, %2, 16
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3
|
|
...
|
|
|
|
---
|
|
name: test_insert_s128_s16_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_s128_s16_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
|
|
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[DEF]](s32)
|
|
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[MV]], [[C]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF1]], [[C1]]
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND]], [[C2]](s32)
|
|
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[AND1]], [[C2]](s32)
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND]], [[C2]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]]
|
|
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 -281470681743361
|
|
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)
|
|
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C3]]
|
|
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C4]]
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND2]], [[SHL]]
|
|
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[AND3]], [[OR]]
|
|
; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[OR1]](s64), [[OR2]](s64)
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s128) = COPY [[MV1]](s128)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY2]](s128)
|
|
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s32) = COPY $vgpr4
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s128) = G_INSERT %0, %2, 32
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3
|
|
...
|
|
|
|
---
|
|
name: test_insert_s128_s16_offset112
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_s128_s16_offset112
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
|
|
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
|
|
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[DEF]](s32)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[MV]], [[C]]
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 48
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND]], [[C2]](s32)
|
|
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
|
|
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 281474976710655
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C3]]
|
|
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C4]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[C1]]
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND2]], [[SHL]]
|
|
; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[OR]](s64), [[OR1]](s64)
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s128) = COPY [[MV1]](s128)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY2]](s128)
|
|
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s32) = COPY $vgpr4
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s128) = G_INSERT %0, %2, 112
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3
|
|
...
|
|
|
|
---
|
|
name: test_insert_v2s32_s32_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v2s32_s32_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[UV1]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
|
|
%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(<2 x s32>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v2s32_s32_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v2s32_s32_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[COPY1]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
|
|
%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(<2 x s32>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v3s32_s32_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s32_s32_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[UV1]](s32), [[UV2]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
|
|
%0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
|
|
%1:_(s32) = COPY $vgpr3
|
|
%2:_(<3 x s32>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v3s32_s32_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s32_s32_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[COPY1]](s32), [[UV2]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
|
|
%0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
|
|
%1:_(s32) = COPY $vgpr3
|
|
%2:_(<3 x s32>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1_vgpr2 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v3s32_s32_offset64
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s32_s32_offset64
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[COPY1]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
|
|
%0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
|
|
%1:_(s32) = COPY $vgpr3
|
|
%2:_(<3 x s32>) = G_INSERT %0, %1, 64
|
|
$vgpr0_vgpr1_vgpr2 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_s32_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_s32_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[UV1]](s32), [[UV2]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s32) = COPY $vgpr4
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_s32_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_s32_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[COPY1]](s32), [[UV2]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s32) = COPY $vgpr4
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_s32_offset64
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_s32_offset64
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[COPY1]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s32) = COPY $vgpr4
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 64
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_s32_offset96
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_s32_offset96
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[COPY1]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s32) = COPY $vgpr4
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 96
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_s64_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_s64_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[UV5]](s32), [[UV2]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s64) = COPY $vgpr4_vgpr5
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_s64_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_s64_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s64) = COPY $vgpr4_vgpr5
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_s64_offset64
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_s64_offset64
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV4]](s32), [[UV5]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s64) = COPY $vgpr4_vgpr5
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 64
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_s96_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_s96_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s96)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[UV5]](s32), [[UV6]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s96) = COPY $vgpr4_vgpr5_vgpr6
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_s96_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_s96_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s96)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV6]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s96) = COPY $vgpr4_vgpr5_vgpr6
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_v2s32_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_v2s32_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[UV5]](s32), [[UV2]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(<2 x s32>) = COPY $vgpr4_vgpr5
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_v2s32_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_v2s32_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(<2 x s32>) = COPY $vgpr4_vgpr5
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_v2s32_offset64
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_v2s32_offset64
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV4]](s32), [[UV5]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(<2 x s32>) = COPY $vgpr4_vgpr5
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 64
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_v3s32_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_v3s32_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[UV5]](s32), [[UV6]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(<3 x s32>) = COPY $vgpr4_vgpr5_vgpr6
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_v3s32_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_v3s32_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr4_vgpr5_vgpr6
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV6]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(<3 x s32>) = COPY $vgpr4_vgpr5_vgpr6
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_p0_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_p0_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](p0)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[UV5]](s32), [[UV2]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(p0) = COPY $vgpr4_vgpr5
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_p0_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_p0_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](p0)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV3]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(p0) = COPY $vgpr4_vgpr5
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s32_p0_offset64
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s32_p0_offset64
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](p0)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV4]](s32), [[UV5]](s32)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
|
|
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(p0) = COPY $vgpr4_vgpr5
|
|
%2:_(<4 x s32>) = G_INSERT %0, %1, 64
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_v2s64_p0_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v2s64_p0_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
|
|
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p0)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[PTRTOINT]](s64), [[UV1]](s64)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
|
|
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(p0) = COPY $vgpr4_vgpr5
|
|
%2:_(<2 x s64>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_v2p0_p0_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
|
|
; CHECK-LABEL: name: test_insert_v2p0_p0_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<2 x p0>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[COPY1]](p0), [[UV1]](p0)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
|
|
%0:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(p0) = COPY $vgpr4_vgpr5
|
|
%2:_(<2 x p0>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_v4p3_p3_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_v4p3_p3_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x p3>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p3) = COPY $vgpr4
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3), [[UV2:%[0-9]+]]:_(p3), [[UV3:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY]](<4 x p3>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x p3>) = G_BUILD_VECTOR [[COPY1]](p3), [[UV1]](p3), [[UV2]](p3), [[UV3]](p3)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x p3>)
|
|
%0:_(<4 x p3>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(p3) = COPY $vgpr4
|
|
%2:_(<4 x p3>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_v4p3_s32_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
|
|
; CHECK-LABEL: name: test_insert_v4p3_s32_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x p3>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3), [[UV2:%[0-9]+]]:_(p3), [[UV3:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY]](<4 x p3>)
|
|
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[COPY1]](s32)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x p3>) = G_BUILD_VECTOR [[INTTOPTR]](p3), [[UV1]](p3), [[UV2]](p3), [[UV3]](p3)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x p3>)
|
|
%0:_(<4 x p3>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:_(s32) = COPY $vgpr4
|
|
%2:_(<4 x p3>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_v4p0_v2p0_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11
|
|
|
|
; CHECK-LABEL: name: test_insert_v4p0_v2p0_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr8_vgpr9_vgpr10_vgpr11
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0), [[UV2:%[0-9]+]]:_(p0), [[UV3:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<4 x p0>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(p0), [[UV5:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY1]](<2 x p0>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x p0>) = G_BUILD_VECTOR [[UV4]](p0), [[UV5]](p0), [[UV2]](p0), [[UV3]](p0)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x p0>)
|
|
%0:_(<4 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
|
%1:_(<2 x p0>) = COPY $vgpr8_vgpr9_vgpr10_vgpr11
|
|
%2:_(<4 x p0>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_v4p0_v2p0_offset64
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11
|
|
|
|
; CHECK-LABEL: name: test_insert_v4p0_v2p0_offset64
|
|
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr8_vgpr9_vgpr10_vgpr11
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0), [[UV2:%[0-9]+]]:_(p0), [[UV3:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<4 x p0>)
|
|
; CHECK-NEXT: [[UV4:%[0-9]+]]:_(p0), [[UV5:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY1]](<2 x p0>)
|
|
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x p0>) = G_BUILD_VECTOR [[UV]](p0), [[UV4]](p0), [[UV5]](p0), [[UV3]](p0)
|
|
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x p0>)
|
|
%0:_(<4 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
|
%1:_(<2 x p0>) = COPY $vgpr8_vgpr9_vgpr10_vgpr11
|
|
%2:_(<4 x p0>) = G_INSERT %0, %1, 64
|
|
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_v2s16_s16_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; CHECK-LABEL: name: test_insert_v2s16_s16_offset0
|
|
; CHECK: liveins: $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
|
|
%0:_(<2 x s16>) = COPY $vgpr0
|
|
%1:_(s32) = COPY $vgpr1
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(<2 x s16>) = G_INSERT %0, %2, 0
|
|
$vgpr0 = COPY %3
|
|
...
|
|
|
|
---
|
|
name: test_insert_v2s16_s16_offset1
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; CHECK-LABEL: name: test_insert_v2s16_s16_offset1
|
|
; CHECK: liveins: $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -131071
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C2]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
|
|
%0:_(<2 x s16>) = COPY $vgpr0
|
|
%1:_(s32) = COPY $vgpr1
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(<2 x s16>) = G_INSERT %0, %2, 1
|
|
$vgpr0 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_v2s16_s16_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; CHECK-LABEL: name: test_insert_v2s16_s16_offset16
|
|
; CHECK: liveins: $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
|
|
%0:_(<2 x s16>) = COPY $vgpr0
|
|
%1:_(s32) = COPY $vgpr1
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(<2 x s16>) = G_INSERT %0, %2, 16
|
|
$vgpr0 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_v3s16_s16_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s16_s16_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<3 x s16>) = G_EXTRACT %0, 0
|
|
%2:_(s32) = COPY $vgpr2
|
|
%3:_(s16) = G_TRUNC %2
|
|
%4:_(<3 x s16>) = G_INSERT %1, %3, 0
|
|
%5:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
%6:_(<4 x s16>) = G_INSERT %5, %4, 0
|
|
$vgpr0_vgpr1 = COPY %6
|
|
...
|
|
---
|
|
name: test_insert_v3s16_s16_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s16_s16_offset16
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<3 x s16>) = G_EXTRACT %0, 0
|
|
%2:_(s32) = COPY $vgpr2
|
|
%3:_(s16) = G_TRUNC %2
|
|
%4:_(<3 x s16>) = G_INSERT %1, %3, 16
|
|
%5:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
%6:_(<4 x s16>) = G_INSERT %5, %4, 0
|
|
$vgpr0_vgpr1 = COPY %6
|
|
...
|
|
---
|
|
name: test_insert_v3s16_s16_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s16_s16_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C2]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<3 x s16>) = G_EXTRACT %0, 0
|
|
%2:_(s32) = COPY $vgpr2
|
|
%3:_(s16) = G_TRUNC %2
|
|
%4:_(<3 x s16>) = G_INSERT %1, %3, 32
|
|
%5:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
%6:_(<4 x s16>) = G_INSERT %5, %4, 0
|
|
$vgpr0_vgpr1 = COPY %6
|
|
...
|
|
---
|
|
name: test_insert_v3s16_v2s16_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s16_v2s16_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[COPY1]](<2 x s16>), [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<3 x s16>) = G_EXTRACT %0, 0
|
|
%2:_(<2 x s16>) = COPY $vgpr2
|
|
%4:_(<3 x s16>) = G_INSERT %1, %2, 0
|
|
%5:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
%6:_(<4 x s16>) = G_INSERT %5, %4, 0
|
|
$vgpr0_vgpr1 = COPY %6
|
|
...
|
|
---
|
|
name: test_insert_v3s16_v2s16_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s16_v2s16_offset16
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>)
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
|
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
|
|
; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<3 x s16>) = G_EXTRACT %0, 0
|
|
%2:_(<2 x s16>) = COPY $vgpr2
|
|
%4:_(<3 x s16>) = G_INSERT %1, %2, 16
|
|
%5:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
%6:_(<4 x s16>) = G_INSERT %5, %4, 0
|
|
$vgpr0_vgpr1 = COPY %6
|
|
...
|
|
---
|
|
name: test_insert_v3s16_s32_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s16_s32_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<3 x s16>) = G_EXTRACT %0, 0
|
|
%2:_(s32) = COPY $vgpr2
|
|
%4:_(<3 x s16>) = G_INSERT %1, %2, 0
|
|
%5:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
%6:_(<4 x s16>) = G_INSERT %5, %4, 0
|
|
$vgpr0_vgpr1 = COPY %6
|
|
...
|
|
---
|
|
name: test_insert_v3s16_s32_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v3s16_s32_offset16
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
|
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
|
|
; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<3 x s16>) = G_EXTRACT %0, 0
|
|
%2:_(s32) = COPY $vgpr2
|
|
%4:_(<3 x s16>) = G_INSERT %1, %2, 16
|
|
%5:_(<4 x s16>) = G_IMPLICIT_DEF
|
|
%6:_(<4 x s16>) = G_INSERT %5, %4, 0
|
|
$vgpr0_vgpr1 = COPY %6
|
|
...
|
|
---
|
|
name: test_insert_v4s16_s16_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_s16_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(<4 x s16>) = G_INSERT %0, %2, 0
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_v4s16_s16_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_s16_offset16
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(<4 x s16>) = G_INSERT %0, %2, 16
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_v4s16_s16_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_s16_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(<4 x s16>) = G_INSERT %0, %2, 32
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_v4s16_s16_offset48
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_s16_offset48
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(<4 x s16>) = G_INSERT %0, %2, 48
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_v4s16_v2s16_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_v2s16_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<2 x s16>) = COPY $vgpr2
|
|
%2:_(<4 x s16>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s16_v2s16_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_v2s16_offset16
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
|
|
; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>)
|
|
; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST2]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL1]]
|
|
; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<2 x s16>) = COPY $vgpr2
|
|
%2:_(<4 x s16>) = G_INSERT %0, %1, 16
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s16_v2s16_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_v2s16_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<2 x s16>) = COPY $vgpr2
|
|
%2:_(<4 x s16>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s16_v3s16_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_v3s16_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>)
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST2]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<4 x s16>) = COPY $vgpr2_vgpr3
|
|
%2:_(<3 x s16>) = G_EXTRACT %1, 0
|
|
%3:_(<4 x s16>) = G_INSERT %0, %2, 0
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_v4s16_v3s16_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_v3s16_offset16
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST2]], [[C1]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
|
|
; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(<4 x s16>) = COPY $vgpr2_vgpr3
|
|
%2:_(<3 x s16>) = G_EXTRACT %1, 0
|
|
%3:_(<4 x s16>) = G_INSERT %0, %2, 16
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_v4s16_s32_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_s32_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(<4 x s16>) = G_INSERT %0, %1, 0
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s16_s32_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_s32_offset16
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
|
|
; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL1]]
|
|
; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(<4 x s16>) = G_INSERT %0, %1, 16
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
---
|
|
name: test_insert_v4s16_s32_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_v4s16_s32_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
|
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
|
|
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST]](<2 x s16>)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
|
|
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(<4 x s16>) = G_INSERT %0, %1, 32
|
|
$vgpr0_vgpr1 = COPY %2
|
|
...
|
|
|
|
---
|
|
name: test_insert_s64_s16_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_s64_s16_offset0
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -65536
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND]]
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[OR]](s64)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY2]](s64)
|
|
%0:_(s64) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s64) = G_INSERT %0, %2, 0
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_s64_s16_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_s64_s16_offset16
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND]], [[C1]](s32)
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -4294901761
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C2]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[SHL]]
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[OR]](s64)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY2]](s64)
|
|
%0:_(s64) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s64) = G_INSERT %0, %2, 16
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_s64_s16_offset32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_s64_s16_offset32
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND]], [[C1]](s32)
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -281470681743361
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C2]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[SHL]]
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[OR]](s64)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY2]](s64)
|
|
%0:_(s64) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s64) = G_INSERT %0, %2, 32
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_s64_s16_offset48
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; CHECK-LABEL: name: test_insert_s64_s16_offset48
|
|
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
|
|
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 48
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND]], [[C1]](s32)
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 281474976710655
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C2]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[SHL]]
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[OR]](s64)
|
|
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY2]](s64)
|
|
%0:_(s64) = COPY $vgpr0_vgpr1
|
|
%1:_(s32) = COPY $vgpr2
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s64) = G_INSERT %0, %2, 48
|
|
$vgpr0_vgpr1 = COPY %3
|
|
...
|
|
---
|
|
name: test_insert_s32_s16_offset0
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; CHECK-LABEL: name: test_insert_s32_s16_offset0
|
|
; CHECK: liveins: $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65536
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[AND]]
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
|
|
; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32)
|
|
%0:_(s32) = COPY $vgpr0
|
|
%1:_(s32) = COPY $vgpr1
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s32) = G_INSERT %0, %2, 0
|
|
$vgpr0 = COPY %3
|
|
...
|
|
|
|
---
|
|
name: test_insert_s32_s16_offset1
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; CHECK-LABEL: name: test_insert_s32_s16_offset1
|
|
; CHECK: liveins: $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -131071
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C2]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
|
|
; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32)
|
|
%0:_(s32) = COPY $vgpr0
|
|
%1:_(s32) = COPY $vgpr1
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s32) = G_INSERT %0, %2, 1
|
|
$vgpr0 = COPY %3
|
|
...
|
|
|
|
---
|
|
name: test_insert_s32_s16_offset8
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; CHECK-LABEL: name: test_insert_s32_s16_offset8
|
|
; CHECK: liveins: $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -16776961
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C2]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
|
|
; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32)
|
|
%0:_(s32) = COPY $vgpr0
|
|
%1:_(s32) = COPY $vgpr1
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s32) = G_INSERT %0, %2, 8
|
|
$vgpr0 = COPY %3
|
|
...
|
|
|
|
---
|
|
name: test_insert_s32_s16_offset16
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; CHECK-LABEL: name: test_insert_s32_s16_offset16
|
|
; CHECK: liveins: $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
|
|
; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32)
|
|
%0:_(s32) = COPY $vgpr0
|
|
%1:_(s32) = COPY $vgpr1
|
|
%2:_(s16) = G_TRUNC %1
|
|
%3:_(s32) = G_INSERT %0, %2, 16
|
|
$vgpr0 = COPY %3
|
|
...
|