TheRock/compiler/amd-llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-buildvector-identities.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs -o - %s | FileCheck %s

---
name: v2s16_trunc_same_bitcast_lshr16
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: v2s16_trunc_same_bitcast_lshr16
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src:_(<2 x s16>) = COPY $vgpr0
    ; CHECK-NEXT: $vgpr0 = COPY %src(<2 x s16>)
    %src:_(<2 x s16>) = COPY $vgpr0
    %bitcast:_(s32) = G_BITCAST %src
    %lshr_amount:_(s32) = G_CONSTANT i32 16
    %lshr:_(s32) = G_LSHR %bitcast, %lshr_amount
    %root:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %bitcast, %lshr
    $vgpr0 = COPY %root
...

---
name: v2s16_trunc_different_bitcast_lshr16
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: v2s16_trunc_different_bitcast_lshr16
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src:_(<2 x s16>) = COPY $vgpr0
    ; CHECK-NEXT: $vgpr0 = COPY %src(<2 x s16>)
    %src:_(<2 x s16>) = COPY $vgpr0
    %bitcast0:_(s32) = G_BITCAST %src
    %bitcast1:_(s32) = G_BITCAST %src
    %lshr_amount:_(s32) = G_CONSTANT i32 16
    %lshr:_(s32) = G_LSHR %bitcast1, %lshr_amount
    %root:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %bitcast0, %lshr
    $vgpr0 = COPY %root
...

---
name: v2s16_trunc_same_bitcast_lshr8_nocombine
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: v2s16_trunc_same_bitcast_lshr8_nocombine
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src:_(<2 x s16>) = COPY $vgpr0
    ; CHECK-NEXT: %bitcast:_(s32) = G_BITCAST %src(<2 x s16>)
    ; CHECK-NEXT: %lshr_amount:_(s32) = G_CONSTANT i32 8
    ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %bitcast, %lshr_amount(s32)
    ; CHECK-NEXT: %root:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %bitcast(s32), %lshr(s32)
    ; CHECK-NEXT: $vgpr0 = COPY %root(<2 x s16>)
    %src:_(<2 x s16>) = COPY $vgpr0
    %bitcast:_(s32) = G_BITCAST %src
    %lshr_amount:_(s32) = G_CONSTANT i32 8
    %lshr:_(s32) = G_LSHR %bitcast, %lshr_amount
    %root:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %bitcast, %lshr
    $vgpr0 = COPY %root
...

---
name: v2s16_same_bitcast_lshr16
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: v2s16_same_bitcast_lshr16
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src:_(<2 x s16>) = COPY $vgpr0
    ; CHECK-NEXT: $vgpr0 = COPY %src(<2 x s16>)
    %src:_(<2 x s16>) = COPY $vgpr0
    %bitcast:_(s32) = G_BITCAST %src
    %lshr_amount:_(s32) = G_CONSTANT i32 16
    %lshr:_(s32) = G_LSHR %bitcast, %lshr_amount
    %trunclo:_(s16) = G_TRUNC %bitcast
    %trunchi:_(s16) = G_TRUNC %lshr
    %root:_(<2 x s16>) = G_BUILD_VECTOR %trunclo, %trunchi
    $vgpr0 = COPY %root
...

---
name: v2s16_same_bitcast_lshr8_nocombine
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: v2s16_same_bitcast_lshr8_nocombine
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src:_(<2 x s16>) = COPY $vgpr0
    ; CHECK-NEXT: %bitcast:_(s32) = G_BITCAST %src(<2 x s16>)
    ; CHECK-NEXT: %lshr_amount:_(s32) = G_CONSTANT i32 8
    ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %bitcast, %lshr_amount(s32)
    ; CHECK-NEXT: %trunclo:_(s16) = G_TRUNC %bitcast(s32)
    ; CHECK-NEXT: %trunchi:_(s16) = G_TRUNC %lshr(s32)
    ; CHECK-NEXT: %root:_(<2 x s16>) = G_BUILD_VECTOR %trunclo(s16), %trunchi(s16)
    ; CHECK-NEXT: $vgpr0 = COPY %root(<2 x s16>)
    %src:_(<2 x s16>) = COPY $vgpr0
    %bitcast:_(s32) = G_BITCAST %src
    %lshr_amount:_(s32) = G_CONSTANT i32 8
    %lshr:_(s32) = G_LSHR %bitcast, %lshr_amount
    %trunclo:_(s16) = G_TRUNC %bitcast
    %trunchi:_(s16) = G_TRUNC %lshr
    %root:_(<2 x s16>) = G_BUILD_VECTOR %trunclo, %trunchi
    $vgpr0 = COPY %root
...

---
name: v2s16_undefhi
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: v2s16_undefhi
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src:_(<2 x s16>) = COPY $vgpr0
    ; CHECK-NEXT: $vgpr0 = COPY %src(<2 x s16>)
    %src:_(<2 x s16>) = COPY $vgpr0
    %bitcast:_(s32) = G_BITCAST %src
    %trunc:_(s16) = G_TRUNC %bitcast
    %undef:_(s16) = G_IMPLICIT_DEF
    %root:_(<2 x s16>) = G_BUILD_VECTOR %trunc, %undef
    $vgpr0 = COPY %root
...

---
name: v2s32_undefhi
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1
    ; CHECK-LABEL: name: v2s32_undefhi
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY %src(<2 x s32>)
    %src:_(<2 x s32>) = COPY $vgpr0_vgpr1
    %bitcast:_(s64) = G_BITCAST %src
    %trunc:_(s32) = G_TRUNC %bitcast
    %undef:_(s32) = G_IMPLICIT_DEF
    %root:_(<2 x s32>) = G_BUILD_VECTOR %trunc, %undef
    $vgpr0_vgpr1 = COPY %root
...