derek.holloway
7502bf64a4
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340 lines
12 KiB
YAML
340 lines
12 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: remove_and_255_zextload
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: remove_and_255_zextload
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; CHECK: liveins: $vgpr0_vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %and:_(s32) = G_ZEXTLOAD %ptr(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: $vgpr0 = COPY %and(s32)
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%ptr:_(p1) = COPY $vgpr0_vgpr1
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%load:_(s32) = G_ZEXTLOAD %ptr :: (load (s8), addrspace 1, align 1)
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%mask:_(s32) = G_CONSTANT i32 255
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%and:_(s32) = G_AND %load, %mask
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$vgpr0 = COPY %and
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...
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---
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name: remove_and_255_smin_zextload
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: remove_and_255_smin_zextload
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
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; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %smin:_(s32) = G_SMIN %load0, %load1
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; CHECK-NEXT: $vgpr0 = COPY %smin(s32)
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%ptr0:_(p1) = COPY $vgpr0_vgpr1
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%ptr1:_(p1) = COPY $vgpr2_vgpr3
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%load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)
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%load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)
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%smin:_(s32) = G_SMIN %load0, %load1
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%mask:_(s32) = G_CONSTANT i32 255
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%and:_(s32) = G_AND %smin, %mask
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$vgpr0 = COPY %and
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...
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---
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name: remove_and_255_smax_zextload
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: remove_and_255_smax_zextload
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
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; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %smax:_(s32) = G_SMAX %load0, %load1
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; CHECK-NEXT: $vgpr0 = COPY %smax(s32)
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%ptr0:_(p1) = COPY $vgpr0_vgpr1
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%ptr1:_(p1) = COPY $vgpr2_vgpr3
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%load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)
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%load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)
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%smax:_(s32) = G_SMAX %load0, %load1
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%mask:_(s32) = G_CONSTANT i32 255
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%and:_(s32) = G_AND %smax, %mask
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$vgpr0 = COPY %and
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...
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---
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name: remove_and_255_umin_zextload
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: remove_and_255_umin_zextload
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
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; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %umin:_(s32) = G_UMIN %load0, %load1
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; CHECK-NEXT: $vgpr0 = COPY %umin(s32)
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%ptr0:_(p1) = COPY $vgpr0_vgpr1
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%ptr1:_(p1) = COPY $vgpr2_vgpr3
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%load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)
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%load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)
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%umin:_(s32) = G_UMIN %load0, %load1
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%mask:_(s32) = G_CONSTANT i32 255
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%and:_(s32) = G_AND %umin, %mask
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$vgpr0 = COPY %and
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...
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---
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name: remove_and_255_umax_zextload
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: remove_and_255_umax_zextload
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
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; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %umax:_(s32) = G_UMAX %load0, %load1
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; CHECK-NEXT: $vgpr0 = COPY %umax(s32)
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%ptr0:_(p1) = COPY $vgpr0_vgpr1
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%ptr1:_(p1) = COPY $vgpr2_vgpr3
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%load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)
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%load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)
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%umax:_(s32) = G_UMAX %load0, %load1
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%mask:_(s32) = G_CONSTANT i32 255
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%and:_(s32) = G_AND %umax, %mask
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$vgpr0 = COPY %and
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...
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# Don't have enough known bits for lhs
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---
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name: remove_and_255_smin_fail_lhs
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: remove_and_255_smin_fail_lhs
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
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; CHECK-NEXT: %load0:_(s32) = G_LOAD %ptr0(p1) :: (load (s32), addrspace 1)
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; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %smin:_(s32) = G_SMIN %load0, %load1
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; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 255
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; CHECK-NEXT: %and:_(s32) = G_AND %smin, %mask
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; CHECK-NEXT: $vgpr0 = COPY %and(s32)
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%ptr0:_(p1) = COPY $vgpr0_vgpr1
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%ptr1:_(p1) = COPY $vgpr2_vgpr3
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%load0:_(s32) = G_LOAD %ptr0 :: (load (s32), addrspace 1, align 4)
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%load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)
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%smin:_(s32) = G_SMIN %load0, %load1
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%mask:_(s32) = G_CONSTANT i32 255
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%and:_(s32) = G_AND %smin, %mask
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$vgpr0 = COPY %and
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...
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# Don't have enough known bits for rhs
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---
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name: remove_and_255_smin_fail_rhs
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: remove_and_255_smin_fail_rhs
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
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; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)
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; CHECK-NEXT: %load1:_(s32) = G_LOAD %ptr1(p1) :: (load (s32), addrspace 1)
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; CHECK-NEXT: %smin:_(s32) = G_SMIN %load0, %load1
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; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 255
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; CHECK-NEXT: %and:_(s32) = G_AND %smin, %mask
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; CHECK-NEXT: $vgpr0 = COPY %and(s32)
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%ptr0:_(p1) = COPY $vgpr0_vgpr1
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%ptr1:_(p1) = COPY $vgpr2_vgpr3
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%load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)
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%load1:_(s32) = G_LOAD %ptr1 :: (load (s32), addrspace 1, align 4)
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%smin:_(s32) = G_SMIN %load0, %load1
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%mask:_(s32) = G_CONSTANT i32 255
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%and:_(s32) = G_AND %smin, %mask
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$vgpr0 = COPY %and
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...
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# Test known bits for groupstaticsize is the maximum LDS size.
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---
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name: remove_and_65535_groupstaticsize
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: remove_and_65535_groupstaticsize
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; CHECK: liveins: $vgpr0_vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
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; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 65535
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; CHECK-NEXT: %and:_(s32) = G_AND %lds_size, %mask
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; CHECK-NEXT: $vgpr0 = COPY %and(s32)
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%ptr:_(p1) = COPY $vgpr0_vgpr1
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%lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
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%mask:_(s32) = G_CONSTANT i32 65535
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%and:_(s32) = G_AND %lds_size, %mask
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$vgpr0 = COPY %and
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...
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---
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name: remove_and_131071_groupstaticsize
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: remove_and_131071_groupstaticsize
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; CHECK: liveins: $vgpr0_vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
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; CHECK-NEXT: $vgpr0 = COPY %lds_size(s32)
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%ptr:_(p1) = COPY $vgpr0_vgpr1
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%lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
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%mask:_(s32) = G_CONSTANT i32 131071
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%and:_(s32) = G_AND %lds_size, %mask
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$vgpr0 = COPY %and
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...
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---
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name: no_remove_and_65536_groupstaticsize
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: no_remove_and_65536_groupstaticsize
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; CHECK: liveins: $vgpr0_vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
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; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 65536
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; CHECK-NEXT: %and:_(s32) = G_AND %lds_size, %mask
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; CHECK-NEXT: $vgpr0 = COPY %and(s32)
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%ptr:_(p1) = COPY $vgpr0_vgpr1
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%lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
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%mask:_(s32) = G_CONSTANT i32 65536
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%and:_(s32) = G_AND %lds_size, %mask
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$vgpr0 = COPY %and
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...
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---
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name: no_remove_and_32767_groupstaticsize
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: no_remove_and_32767_groupstaticsize
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; CHECK: liveins: $vgpr0_vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
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; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 32767
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; CHECK-NEXT: %and:_(s32) = G_AND %lds_size, %mask
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; CHECK-NEXT: $vgpr0 = COPY %and(s32)
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%ptr:_(p1) = COPY $vgpr0_vgpr1
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%lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
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%mask:_(s32) = G_CONSTANT i32 32767
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%and:_(s32) = G_AND %lds_size, %mask
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$vgpr0 = COPY %and
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...
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# We can conclude the number of bits based only on one operand
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---
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name: remove_and_umin_lhs_only
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4
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; CHECK-LABEL: name: remove_and_umin_lhs_only
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
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; CHECK-NEXT: %val:_(s32) = COPY $vgpr4
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; CHECK-NEXT: %k255:_(s32) = G_CONSTANT i32 255
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; CHECK-NEXT: %umin0:_(s32) = G_UMIN %val, %k255
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; CHECK-NEXT: $vgpr0 = COPY %umin0(s32)
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%ptr0:_(p1) = COPY $vgpr0_vgpr1
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%ptr1:_(p1) = COPY $vgpr2_vgpr3
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%val:_(s32) = COPY $vgpr4
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%k255:_(s32) = G_CONSTANT i32 255
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%umin0:_(s32) = G_UMIN %val, %k255
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%and:_(s32) = G_AND %umin0, %k255
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$vgpr0 = COPY %and
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...
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---
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name: remove_and_umin_rhs_only
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4
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; CHECK-LABEL: name: remove_and_umin_rhs_only
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
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; CHECK-NEXT: %val:_(s32) = COPY $vgpr4
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; CHECK-NEXT: %k255:_(s32) = G_CONSTANT i32 255
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; CHECK-NEXT: %umin0:_(s32) = G_UMIN %val, %k255
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; CHECK-NEXT: $vgpr0 = COPY %umin0(s32)
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%ptr0:_(p1) = COPY $vgpr0_vgpr1
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%ptr1:_(p1) = COPY $vgpr2_vgpr3
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%val:_(s32) = COPY $vgpr4
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%k255:_(s32) = G_CONSTANT i32 255
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%umin0:_(s32) = G_UMIN %k255, %val
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%and:_(s32) = G_AND %umin0, %k255
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$vgpr0 = COPY %and
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|
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...
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