TheRock/compiler/amd-llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s -verify-machineinstrs -o - | FileCheck -check-prefixes=GFX,GFX6 %s
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s -verify-machineinstrs -o - | FileCheck -check-prefixes=GFX,GFX8 %s

---
name: trunc_i64_to_i32_s
legalized: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1
    ; GFX-LABEL: name: trunc_i64_to_i32_s
    ; GFX: liveins: $sgpr0_sgpr1
    ; GFX-NEXT: {{  $}}
    ; GFX-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
    ; GFX-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s32) = G_TRUNC [[COPY]](s64)
    %0:_(s64) = COPY $sgpr0_sgpr1
    %1:_(s32) = G_TRUNC %0
...

---
name: trunc_i64_to_i32_v
legalized: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1
    ; GFX-LABEL: name: trunc_i64_to_i32_v
    ; GFX: liveins: $vgpr0_vgpr1
    ; GFX-NEXT: {{  $}}
    ; GFX-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
    ; GFX-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s32) = G_TRUNC [[COPY]](s64)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s32) = G_TRUNC %0
...

---
name: trunc_i64_to_i1_s
legalized: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1
    ; GFX-LABEL: name: trunc_i64_to_i1_s
    ; GFX: liveins: $sgpr0_sgpr1
    ; GFX-NEXT: {{  $}}
    ; GFX-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
    ; GFX-NEXT: [[UV:%[0-9]+]]:sgpr(s32), [[UV1:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
    %0:_(s64) = COPY $sgpr0_sgpr1
    %1:_(s1) = G_TRUNC %0
    %2:_(s32) = G_ANYEXT %1
...

---
name: trunc_i64_to_i1_v
legalized: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1
    ; GFX-LABEL: name: trunc_i64_to_i1_v
    ; GFX: liveins: $vgpr0_vgpr1
    ; GFX-NEXT: {{  $}}
    ; GFX-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
    ; GFX-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
    ; GFX-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1
    ; GFX-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[C]]
    ; GFX-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0
    ; GFX-NEXT: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[C1]]
    ; GFX-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
    ; GFX-NEXT: [[C2:%[0-9]+]]:vgpr(s64) = G_CONSTANT i64 0
    ; GFX-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[MV]](s64), [[C2]]
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s1) = G_TRUNC %0
...

---
name: trunc_i32_to_i1_s
legalized: true

body: |
  bb.0:
    liveins: $sgpr0
    ; GFX-LABEL: name: trunc_i32_to_i1_s
    ; GFX: liveins: $sgpr0
    ; GFX-NEXT: {{  $}}
    ; GFX-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
    ; GFX-NEXT: S_ENDPGM 0, implicit [[COPY]](s32)
    %0:_(s32) = COPY $sgpr0
    %1:_(s1) = G_TRUNC %0
    %2:_(s32) = G_ANYEXT %1
    S_ENDPGM 0, implicit %2
...

---
name: trunc_i32_to_i1_v
legalized: true

body: |
  bb.0:
    liveins: $vgpr0
    ; GFX-LABEL: name: trunc_i32_to_i1_v
    ; GFX: liveins: $vgpr0
    ; GFX-NEXT: {{  $}}
    ; GFX-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; GFX-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1
    ; GFX-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY]], [[C]]
    ; GFX-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0
    ; GFX-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[AND]](s32), [[C1]]
    %0:_(s32) = COPY $vgpr0
    %1:_(s1) = G_TRUNC %0
...

---
name: trunc_i16_to_i1_v
legalized: true

body: |
  bb.0:
    liveins: $vgpr0
    ; GFX6-LABEL: name: trunc_i16_to_i1_v
    ; GFX6: liveins: $vgpr0
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; GFX6-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
    ; GFX6-NEXT: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[TRUNC]](s16)
    ; GFX6-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1
    ; GFX6-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[ANYEXT]], [[C]]
    ; GFX6-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0
    ; GFX6-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[AND]](s32), [[C1]]
    ;
    ; GFX8-LABEL: name: trunc_i16_to_i1_v
    ; GFX8: liveins: $vgpr0
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; GFX8-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
    ; GFX8-NEXT: [[C:%[0-9]+]]:vgpr(s16) = G_CONSTANT i16 1
    ; GFX8-NEXT: [[AND:%[0-9]+]]:vgpr(s16) = G_AND [[TRUNC]], [[C]]
    ; GFX8-NEXT: [[C1:%[0-9]+]]:vgpr(s16) = G_CONSTANT i16 0
    ; GFX8-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[AND]](s16), [[C1]]
    %0:_(s32) = COPY $vgpr0
    %1:_(s16) = G_TRUNC %0
    %2:_(s1) = G_TRUNC %1
...