derek.holloway
7502bf64a4
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53 lines
2.1 KiB
LLVM
53 lines
2.1 KiB
LLVM
; RUN: llc -mtriple=amdgcn -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9,FUNC %s
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; RUN: llc -mtriple=r600 -mcpu=redwood -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -enable-var-scope -check-prefixes=R600,FUNC %s
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; FUNC-LABEL: {{^}}atomic_sub_local:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; R600: LDS_SUB *
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; GCN: ds_sub_u32
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define amdgpu_kernel void @atomic_sub_local(ptr addrspace(3) %local) {
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%unused = atomicrmw volatile sub ptr addrspace(3) %local, i32 5 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_local_const_offset:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; R600: LDS_SUB *
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; GCN: ds_sub_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16
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define amdgpu_kernel void @atomic_sub_local_const_offset(ptr addrspace(3) %local) {
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%gep = getelementptr i32, ptr addrspace(3) %local, i32 4
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%val = atomicrmw volatile sub ptr addrspace(3) %gep, i32 5 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_ret_local:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; R600: LDS_SUB_RET *
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; GCN: ds_sub_rtn_u32
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define amdgpu_kernel void @atomic_sub_ret_local(ptr addrspace(1) %out, ptr addrspace(3) %local) {
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%val = atomicrmw volatile sub ptr addrspace(3) %local, i32 5 seq_cst
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store i32 %val, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_ret_local_const_offset:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; R600: LDS_SUB_RET *
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; GCN: ds_sub_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
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define amdgpu_kernel void @atomic_sub_ret_local_const_offset(ptr addrspace(1) %out, ptr addrspace(3) %local) {
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%gep = getelementptr i32, ptr addrspace(3) %local, i32 5
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%val = atomicrmw volatile sub ptr addrspace(3) %gep, i32 5 seq_cst
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store i32 %val, ptr addrspace(1) %out
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ret void
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}
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