derek.holloway
7502bf64a4
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160 lines
8.4 KiB
LLVM
160 lines
8.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-attributes --check-globals all --version 5
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -passes=amdgpu-attributor < %s | FileCheck -check-prefixes=GFX9 %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -passes=amdgpu-attributor < %s | FileCheck -check-prefixes=GFX10 %s
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;
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; None of these functions should have the attribute amdgpu-no-flat-scratch-init. In these tests
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; we manually set the attribute for the functions. The purpose is to test how the amdgpu-attributor pass
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; handles this situation.
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;
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;; tests of addrspacecast
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define void @with_private_to_flat_addrspacecast(ptr addrspace(5) %ptr) #0 {
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; GFX9-LABEL: define void @with_private_to_flat_addrspacecast(
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; GFX9-SAME: ptr addrspace(5) [[PTR:%.*]]) #[[ATTR0:[0-9]+]] {
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; GFX9-NEXT: [[STOF:%.*]] = addrspacecast ptr addrspace(5) [[PTR]] to ptr
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; GFX9-NEXT: store volatile i32 0, ptr [[STOF]], align 4, !noalias.addrspace [[META0:![0-9]+]]
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; GFX9-NEXT: ret void
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;
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; GFX10-LABEL: define void @with_private_to_flat_addrspacecast(
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; GFX10-SAME: ptr addrspace(5) [[PTR:%.*]]) #[[ATTR0:[0-9]+]] {
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; GFX10-NEXT: [[STOF:%.*]] = addrspacecast ptr addrspace(5) [[PTR]] to ptr
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; GFX10-NEXT: store volatile i32 0, ptr [[STOF]], align 4, !noalias.addrspace [[META0:![0-9]+]]
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; GFX10-NEXT: ret void
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;
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%stof = addrspacecast ptr addrspace(5) %ptr to ptr
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store volatile i32 0, ptr %stof
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ret void
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}
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define amdgpu_kernel void @with_private_to_flat_addrspacecast_cc_kernel(ptr addrspace(5) %ptr) #0 {
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; GFX9-LABEL: define amdgpu_kernel void @with_private_to_flat_addrspacecast_cc_kernel(
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; GFX9-SAME: ptr addrspace(5) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX9-NEXT: [[STOF:%.*]] = addrspacecast ptr addrspace(5) [[PTR]] to ptr
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; GFX9-NEXT: store volatile i32 0, ptr [[STOF]], align 4, !noalias.addrspace [[META0]]
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; GFX9-NEXT: ret void
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;
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; GFX10-LABEL: define amdgpu_kernel void @with_private_to_flat_addrspacecast_cc_kernel(
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; GFX10-SAME: ptr addrspace(5) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX10-NEXT: [[STOF:%.*]] = addrspacecast ptr addrspace(5) [[PTR]] to ptr
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; GFX10-NEXT: store volatile i32 0, ptr [[STOF]], align 4, !noalias.addrspace [[META0]]
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; GFX10-NEXT: ret void
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;
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%stof = addrspacecast ptr addrspace(5) %ptr to ptr
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store volatile i32 0, ptr %stof
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ret void
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}
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define void @call_with_private_to_flat_addrspacecast(ptr addrspace(5) %ptr) #0 {
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; GFX9-LABEL: define void @call_with_private_to_flat_addrspacecast(
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; GFX9-SAME: ptr addrspace(5) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX9-NEXT: call void @with_private_to_flat_addrspacecast(ptr addrspace(5) [[PTR]])
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; GFX9-NEXT: ret void
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;
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; GFX10-LABEL: define void @call_with_private_to_flat_addrspacecast(
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; GFX10-SAME: ptr addrspace(5) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX10-NEXT: call void @with_private_to_flat_addrspacecast(ptr addrspace(5) [[PTR]])
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; GFX10-NEXT: ret void
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;
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call void @with_private_to_flat_addrspacecast(ptr addrspace(5) %ptr)
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ret void
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}
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define amdgpu_kernel void @call_with_private_to_flat_addrspacecast_cc_kernel(ptr addrspace(5) %ptr) #0 {
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; GFX9-LABEL: define amdgpu_kernel void @call_with_private_to_flat_addrspacecast_cc_kernel(
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; GFX9-SAME: ptr addrspace(5) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX9-NEXT: call void @with_private_to_flat_addrspacecast(ptr addrspace(5) [[PTR]])
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; GFX9-NEXT: ret void
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;
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; GFX10-LABEL: define amdgpu_kernel void @call_with_private_to_flat_addrspacecast_cc_kernel(
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; GFX10-SAME: ptr addrspace(5) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX10-NEXT: call void @with_private_to_flat_addrspacecast(ptr addrspace(5) [[PTR]])
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; GFX10-NEXT: ret void
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;
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call void @with_private_to_flat_addrspacecast(ptr addrspace(5) %ptr)
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ret void
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}
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;; tests of addrspacecast in a constant
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define amdgpu_kernel void @private_constant_expression_use(ptr addrspace(1) nocapture %out) #0 {
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; GFX9-LABEL: define amdgpu_kernel void @private_constant_expression_use(
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; GFX9-SAME: ptr addrspace(1) captures(none) [[OUT:%.*]]) #[[ATTR0]] {
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; GFX9-NEXT: store volatile ptr addrspacecast (ptr addrspace(5) inttoptr (i32 123 to ptr addrspace(5)) to ptr), ptr addrspace(1) [[OUT]], align 8
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; GFX9-NEXT: ret void
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;
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; GFX10-LABEL: define amdgpu_kernel void @private_constant_expression_use(
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; GFX10-SAME: ptr addrspace(1) captures(none) [[OUT:%.*]]) #[[ATTR0]] {
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; GFX10-NEXT: store volatile ptr addrspacecast (ptr addrspace(5) inttoptr (i32 123 to ptr addrspace(5)) to ptr), ptr addrspace(1) [[OUT]], align 8
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; GFX10-NEXT: ret void
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;
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store volatile ptr addrspacecast (ptr addrspace(5) inttoptr (i32 123 to ptr addrspace(5)) to ptr), ptr addrspace(1) %out, align 8
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ret void
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}
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;; tests of intrinsics
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define amdgpu_kernel void @calls_intrin_ascast_cc_kernel(ptr addrspace(3) %ptr) #0 {
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; GFX9-LABEL: define amdgpu_kernel void @calls_intrin_ascast_cc_kernel(
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; GFX9-SAME: ptr addrspace(3) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX9-NEXT: [[TMP1:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p3(ptr addrspace(3) [[PTR]])
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; GFX9-NEXT: store volatile i32 7, ptr [[TMP1]], align 4
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; GFX9-NEXT: ret void
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;
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; GFX10-LABEL: define amdgpu_kernel void @calls_intrin_ascast_cc_kernel(
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; GFX10-SAME: ptr addrspace(3) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX10-NEXT: [[TMP1:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p3(ptr addrspace(3) [[PTR]])
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; GFX10-NEXT: store volatile i32 7, ptr [[TMP1]], align 4
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; GFX10-NEXT: ret void
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;
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%1 = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p3(ptr addrspace(3) %ptr)
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store volatile i32 7, ptr %1, align 4
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ret void
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}
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define void @calls_intrin_ascast(ptr addrspace(3) %ptr) #0 {
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; GFX9-LABEL: define void @calls_intrin_ascast(
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; GFX9-SAME: ptr addrspace(3) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX9-NEXT: [[TMP1:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p3(ptr addrspace(3) [[PTR]])
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; GFX9-NEXT: store volatile i32 7, ptr [[TMP1]], align 4
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; GFX9-NEXT: ret void
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;
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; GFX10-LABEL: define void @calls_intrin_ascast(
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; GFX10-SAME: ptr addrspace(3) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX10-NEXT: [[TMP1:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p3(ptr addrspace(3) [[PTR]])
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; GFX10-NEXT: store volatile i32 7, ptr [[TMP1]], align 4
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; GFX10-NEXT: ret void
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;
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%1 = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p3(ptr addrspace(3) %ptr)
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store volatile i32 7, ptr %1, align 4
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ret void
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}
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define amdgpu_kernel void @call_calls_intrin_ascast_cc_kernel(ptr addrspace(3) %ptr) #0 {
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; GFX9-LABEL: define amdgpu_kernel void @call_calls_intrin_ascast_cc_kernel(
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; GFX9-SAME: ptr addrspace(3) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX9-NEXT: call void @calls_intrin_ascast(ptr addrspace(3) [[PTR]])
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; GFX9-NEXT: ret void
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;
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; GFX10-LABEL: define amdgpu_kernel void @call_calls_intrin_ascast_cc_kernel(
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; GFX10-SAME: ptr addrspace(3) [[PTR:%.*]]) #[[ATTR0]] {
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; GFX10-NEXT: call void @calls_intrin_ascast(ptr addrspace(3) [[PTR]])
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; GFX10-NEXT: ret void
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;
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call void @calls_intrin_ascast(ptr addrspace(3) %ptr)
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ret void
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}
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attributes #0 = { "amdgpu-no-flat-scratch-init" }
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;.
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; GFX9: attributes #[[ATTR0]] = { "amdgpu-no-cluster-id-x" "amdgpu-no-cluster-id-y" "amdgpu-no-cluster-id-z" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-no-wwm" "target-cpu"="gfx900" }
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; GFX9: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) "target-cpu"="gfx900" }
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;.
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; GFX10: attributes #[[ATTR0]] = { "amdgpu-no-cluster-id-x" "amdgpu-no-cluster-id-y" "amdgpu-no-cluster-id-z" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-no-wwm" "target-cpu"="gfx1010" }
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; GFX10: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) "target-cpu"="gfx1010" }
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;.
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; GFX9: [[META0]] = !{i32 1, i32 5, i32 6, i32 10}
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;.
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; GFX10: [[META0]] = !{i32 1, i32 5, i32 6, i32 10}
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;.
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