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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=si-fix-sgpr-copies %s -o - | FileCheck %s
---
name: main
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: main
; CHECK: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sgpr_32 = V_READFIRSTLANE_B32 [[DEF1]], implicit $exec
; CHECK-NEXT: early-clobber %2:sreg_32 = STRICT_WWM killed undef [[V_READFIRSTLANE_B32_]], implicit $exec
; CHECK-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 killed undef [[DEF]], killed undef %2, implicit-def dead $scc
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, killed undef [[S_OR_B32_]], implicit-def dead $scc
; CHECK-NEXT: S_CMP_EQ_U32 killed undef [[S_AND_B32_]], 1, implicit-def $scc
; CHECK-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_XOR_B32 killed undef [[S_AND_B32_]], killed undef [[S_AND_B32_]], implicit-def dead $scc
; CHECK-NEXT: SI_RETURN_TO_EPILOG undef $sgpr0
%0:sreg_32 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
early-clobber %2:sreg_32 = STRICT_WWM killed undef %1, implicit $exec
%3:sreg_32 = S_OR_B32 killed undef %0, killed undef %2, implicit-def dead $scc
%4:sreg_32 = S_AND_B32 1, killed undef %3, implicit-def dead $scc
S_CMP_EQ_U32 killed undef %4, 1, implicit-def $scc
%5:sreg_32_xm0_xexec = S_XOR_B32 killed undef %4, killed undef %4, implicit-def dead $scc
SI_RETURN_TO_EPILOG undef $sgpr0
...