derek.holloway
7502bf64a4
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285 lines
11 KiB
LLVM
285 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx942 | FileCheck %s -check-prefix=GFX942
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; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1200 | FileCheck %s -check-prefix=GFX12
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; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1250 | FileCheck %s -check-prefix=GFX1250
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declare <2 x half> @llvm.amdgcn.ds.fadd.v2f16(ptr addrspace(3) %ptr, <2 x half> %data, i32, i32, i1)
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declare <2 x i16> @llvm.amdgcn.ds.fadd.v2bf16(ptr addrspace(3) %ptr, <2 x i16> %data)
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define amdgpu_kernel void @flat_atomic_fadd_f32_noret_pat(ptr %ptr) {
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; GFX942-LABEL: flat_atomic_fadd_f32_noret_pat:
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; GFX942: ; %bb.0:
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; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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; GFX942-NEXT: v_mov_b32_e32 v2, 4.0
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; GFX942-NEXT: s_waitcnt lgkmcnt(0)
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; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
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; GFX942-NEXT: buffer_wbl2 sc0 sc1
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; GFX942-NEXT: s_waitcnt vmcnt(0)
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; GFX942-NEXT: flat_atomic_add_f32 v[0:1], v2 sc1
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; GFX942-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX942-NEXT: buffer_inv sc0 sc1
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; GFX942-NEXT: s_endpgm
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;
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; GFX12-LABEL: flat_atomic_fadd_f32_noret_pat:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
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; GFX12-NEXT: v_mov_b32_e32 v2, 4.0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
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; GFX12-NEXT: global_wb scope:SCOPE_SYS
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; GFX12-NEXT: s_wait_storecnt 0x0
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; GFX12-NEXT: flat_atomic_add_f32 v[0:1], v2 scope:SCOPE_SYS
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; GFX12-NEXT: s_wait_storecnt_dscnt 0x0
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; GFX12-NEXT: global_inv scope:SCOPE_SYS
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; GFX12-NEXT: s_endpgm
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;
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; GFX1250-LABEL: flat_atomic_fadd_f32_noret_pat:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
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; GFX1250-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 4.0
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; GFX1250-NEXT: global_wb scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_storecnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: flat_atomic_add_f32 v0, v1, s[0:1] scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_storecnt_dscnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: s_endpgm
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%ret = atomicrmw fadd ptr %ptr, float 4.0 seq_cst, !amdgpu.no.remote.memory !0
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ret void
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}
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define amdgpu_kernel void @flat_atomic_fadd_f32_noret_pat_ieee(ptr %ptr) #0 {
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; GFX942-LABEL: flat_atomic_fadd_f32_noret_pat_ieee:
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; GFX942: ; %bb.0:
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; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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; GFX942-NEXT: v_mov_b32_e32 v2, 4.0
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; GFX942-NEXT: s_waitcnt lgkmcnt(0)
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; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
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; GFX942-NEXT: buffer_wbl2 sc0 sc1
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; GFX942-NEXT: s_waitcnt vmcnt(0)
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; GFX942-NEXT: flat_atomic_add_f32 v[0:1], v2 sc1
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; GFX942-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX942-NEXT: buffer_inv sc0 sc1
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; GFX942-NEXT: s_endpgm
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;
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; GFX12-LABEL: flat_atomic_fadd_f32_noret_pat_ieee:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
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; GFX12-NEXT: v_mov_b32_e32 v2, 4.0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
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; GFX12-NEXT: global_wb scope:SCOPE_SYS
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; GFX12-NEXT: s_wait_storecnt 0x0
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; GFX12-NEXT: flat_atomic_add_f32 v[0:1], v2 scope:SCOPE_SYS
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; GFX12-NEXT: s_wait_storecnt_dscnt 0x0
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; GFX12-NEXT: global_inv scope:SCOPE_SYS
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; GFX12-NEXT: s_endpgm
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;
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; GFX1250-LABEL: flat_atomic_fadd_f32_noret_pat_ieee:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
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; GFX1250-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 4.0
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; GFX1250-NEXT: global_wb scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_storecnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: flat_atomic_add_f32 v0, v1, s[0:1] scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_storecnt_dscnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: s_endpgm
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%ret = atomicrmw fadd ptr %ptr, float 4.0 seq_cst, !amdgpu.no.remote.memory !0
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ret void
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}
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define float @flat_atomic_fadd_f32_rtn_pat(ptr %ptr, float %data) {
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; GFX942-LABEL: flat_atomic_fadd_f32_rtn_pat:
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; GFX942: ; %bb.0:
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; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX942-NEXT: v_mov_b32_e32 v2, 4.0
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; GFX942-NEXT: buffer_wbl2 sc0 sc1
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; GFX942-NEXT: s_waitcnt vmcnt(0)
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; GFX942-NEXT: flat_atomic_add_f32 v0, v[0:1], v2 sc0 sc1
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; GFX942-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX942-NEXT: buffer_inv sc0 sc1
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; GFX942-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: flat_atomic_fadd_f32_rtn_pat:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_mov_b32_e32 v2, 4.0
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; GFX12-NEXT: global_wb scope:SCOPE_SYS
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; GFX12-NEXT: s_wait_storecnt 0x0
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; GFX12-NEXT: flat_atomic_add_f32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: global_inv scope:SCOPE_SYS
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX1250-LABEL: flat_atomic_fadd_f32_rtn_pat:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: v_mov_b32_e32 v2, 4.0
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; GFX1250-NEXT: s_wait_storecnt 0x0
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; GFX1250-NEXT: global_wb scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_storecnt 0x0
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; GFX1250-NEXT: flat_atomic_add_f32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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%ret = atomicrmw fadd ptr %ptr, float 4.0 seq_cst, !amdgpu.no.remote.memory !0
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ret float %ret
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}
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define amdgpu_kernel void @local_atomic_fadd_v2f16_noret(ptr addrspace(3) %ptr, <2 x half> %data) {
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; GFX942-LABEL: local_atomic_fadd_v2f16_noret:
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; GFX942: ; %bb.0:
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; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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; GFX942-NEXT: s_waitcnt lgkmcnt(0)
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; GFX942-NEXT: v_mov_b32_e32 v0, s0
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; GFX942-NEXT: v_mov_b32_e32 v1, s1
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; GFX942-NEXT: ds_pk_add_f16 v0, v1
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; GFX942-NEXT: s_waitcnt lgkmcnt(0)
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; GFX942-NEXT: s_endpgm
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;
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; GFX12-LABEL: local_atomic_fadd_v2f16_noret:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
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; GFX12-NEXT: ds_pk_add_f16 v0, v1
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; GFX12-NEXT: s_wait_dscnt 0x0
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; GFX12-NEXT: global_inv scope:SCOPE_SE
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; GFX12-NEXT: s_endpgm
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;
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; GFX1250-LABEL: local_atomic_fadd_v2f16_noret:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
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; GFX1250-NEXT: ds_pk_add_f16 v0, v1
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; GFX1250-NEXT: s_wait_dscnt 0x0
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; GFX1250-NEXT: s_endpgm
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%ret = call <2 x half> @llvm.amdgcn.ds.fadd.v2f16(ptr addrspace(3) %ptr, <2 x half> %data, i32 0, i32 0, i1 0)
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ret void
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}
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define <2 x half> @local_atomic_fadd_v2f16_rtn(ptr addrspace(3) %ptr, <2 x half> %data) {
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; GFX942-LABEL: local_atomic_fadd_v2f16_rtn:
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; GFX942: ; %bb.0:
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; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX942-NEXT: ds_pk_add_rtn_f16 v0, v0, v1
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; GFX942-NEXT: s_waitcnt lgkmcnt(0)
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; GFX942-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: local_atomic_fadd_v2f16_rtn:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: s_wait_storecnt 0x0
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; GFX12-NEXT: ds_pk_add_rtn_f16 v0, v0, v1
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; GFX12-NEXT: s_wait_dscnt 0x0
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; GFX12-NEXT: global_inv scope:SCOPE_SE
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX1250-LABEL: local_atomic_fadd_v2f16_rtn:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_wait_storecnt 0x0
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; GFX1250-NEXT: ds_pk_add_rtn_f16 v0, v0, v1
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; GFX1250-NEXT: s_wait_dscnt 0x0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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%ret = call <2 x half> @llvm.amdgcn.ds.fadd.v2f16(ptr addrspace(3) %ptr, <2 x half> %data, i32 0, i32 0, i1 0)
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ret <2 x half> %ret
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}
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define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3) %ptr, <2 x i16> %data) {
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; GFX942-LABEL: local_atomic_fadd_v2bf16_noret:
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; GFX942: ; %bb.0:
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; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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; GFX942-NEXT: s_waitcnt lgkmcnt(0)
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; GFX942-NEXT: v_mov_b32_e32 v0, s0
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; GFX942-NEXT: v_mov_b32_e32 v1, s1
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; GFX942-NEXT: ds_pk_add_bf16 v0, v1
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; GFX942-NEXT: s_waitcnt lgkmcnt(0)
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; GFX942-NEXT: s_endpgm
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;
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; GFX12-LABEL: local_atomic_fadd_v2bf16_noret:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
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; GFX12-NEXT: ds_pk_add_bf16 v0, v1
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; GFX12-NEXT: s_wait_dscnt 0x0
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; GFX12-NEXT: global_inv scope:SCOPE_SE
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; GFX12-NEXT: s_endpgm
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;
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; GFX1250-LABEL: local_atomic_fadd_v2bf16_noret:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
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; GFX1250-NEXT: ds_pk_add_bf16 v0, v1
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; GFX1250-NEXT: s_wait_dscnt 0x0
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; GFX1250-NEXT: s_endpgm
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%ret = call <2 x i16> @llvm.amdgcn.ds.fadd.v2bf16(ptr addrspace(3) %ptr, <2 x i16> %data)
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ret void
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}
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define <2 x i16> @local_atomic_fadd_v2bf16_rtn(ptr addrspace(3) %ptr, <2 x i16> %data) {
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; GFX942-LABEL: local_atomic_fadd_v2bf16_rtn:
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; GFX942: ; %bb.0:
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; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX942-NEXT: ds_pk_add_rtn_bf16 v0, v0, v1
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; GFX942-NEXT: s_waitcnt lgkmcnt(0)
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; GFX942-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: local_atomic_fadd_v2bf16_rtn:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: s_wait_storecnt 0x0
|
|
; GFX12-NEXT: ds_pk_add_rtn_bf16 v0, v0, v1
|
|
; GFX12-NEXT: s_wait_dscnt 0x0
|
|
; GFX12-NEXT: global_inv scope:SCOPE_SE
|
|
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX1250-LABEL: local_atomic_fadd_v2bf16_rtn:
|
|
; GFX1250: ; %bb.0:
|
|
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX1250-NEXT: s_wait_kmcnt 0x0
|
|
; GFX1250-NEXT: s_wait_storecnt 0x0
|
|
; GFX1250-NEXT: ds_pk_add_rtn_bf16 v0, v0, v1
|
|
; GFX1250-NEXT: s_wait_dscnt 0x0
|
|
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
|
|
%ret = call <2 x i16> @llvm.amdgcn.ds.fadd.v2bf16(ptr addrspace(3) %ptr, <2 x i16> %data)
|
|
ret <2 x i16> %ret
|
|
}
|
|
|
|
attributes #0 = { denormal_fpenv(float: ieee|ieee) }
|
|
|
|
!0 = !{}
|