derek.holloway
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65 lines
3.0 KiB
LLVM
65 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx908 -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck --check-prefix=GCN %s
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; Test using saddr addressing mode of global_* flat atomic instructions.
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; --------------------------------------------------------------------------------
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; amdgcn global atomic fadd
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; --------------------------------------------------------------------------------
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define amdgpu_ps void @global_fadd_saddr_f32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, float %data) {
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; GCN-LABEL: global_fadd_saddr_f32_nortn:
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; GCN: ; %bb.0:
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; GCN-NEXT: global_atomic_add_f32 v0, v1, s[2:3]
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: buffer_wbinvl1
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; GCN-NEXT: s_endpgm
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%zext.offset = zext i32 %voffset to i64
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%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
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%ret = atomicrmw fadd ptr addrspace(1) %gep0, float %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0, !amdgpu.ignore.denormal.mode !0
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ret void
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}
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define amdgpu_ps void @global_fadd_saddr_f32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, float %data) {
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; GCN-LABEL: global_fadd_saddr_f32_nortn_neg128:
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; GCN: ; %bb.0:
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; GCN-NEXT: global_atomic_add_f32 v0, v1, s[2:3] offset:-128
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: buffer_wbinvl1
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; GCN-NEXT: s_endpgm
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%zext.offset = zext i32 %voffset to i64
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%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
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%gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 -128
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%ret = atomicrmw fadd ptr addrspace(1) %gep1, float %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0, !amdgpu.ignore.denormal.mode !0
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ret void
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}
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define amdgpu_ps void @global_fadd_saddr_v2f16_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, <2 x half> %data) {
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; GCN-LABEL: global_fadd_saddr_v2f16_nortn:
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; GCN: ; %bb.0:
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; GCN-NEXT: global_atomic_pk_add_f16 v0, v1, s[2:3]
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: buffer_wbinvl1
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; GCN-NEXT: s_endpgm
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%zext.offset = zext i32 %voffset to i64
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%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
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%ret = atomicrmw fadd ptr addrspace(1) %gep0, <2 x half> %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0
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ret void
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}
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define amdgpu_ps void @global_fadd_saddr_v2f16_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, <2 x half> %data) {
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; GCN-LABEL: global_fadd_saddr_v2f16_nortn_neg128:
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; GCN: ; %bb.0:
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; GCN-NEXT: global_atomic_pk_add_f16 v0, v1, s[2:3] offset:-128
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: buffer_wbinvl1
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; GCN-NEXT: s_endpgm
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%zext.offset = zext i32 %voffset to i64
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%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
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%gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 -128
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%ret = atomicrmw fadd ptr addrspace(1) %gep1, <2 x half> %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0
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ret void
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}
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!0 = !{}
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