derek.holloway
7502bf64a4
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22 lines
866 B
LLVM
22 lines
866 B
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -O1 -global-isel -new-reg-bank-select < %s | FileCheck %s
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; Test that V_INDIRECT_REG_READ_GPR_IDX expansion handles immediate index operands.
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; The wave.reduce.umin with constant arguments folds to 0, which becomes an
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; immediate index for the insertelement, triggering V_INDIRECT_REG_READ_GPR_IDX
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; with an immediate operand.
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; CHECK-LABEL: indirect_reg_read_imm_idx:
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; CHECK: s_set_gpr_idx_on 0, gpr_idx(SRC0)
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; CHECK-NEXT: v_mov_b32_e32
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; CHECK-NEXT: s_set_gpr_idx_off
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define amdgpu_kernel void @indirect_reg_read_imm_idx() {
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entry:
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%vec = load <32 x i16>, ptr null, align 64
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%idx = call i32 @llvm.amdgcn.wave.reduce.umin.i32(i32 0, i32 0)
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%ins = insertelement <32 x i16> %vec, i16 0, i32 %idx
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store <32 x i16> %ins, ptr null, align 64
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ret void
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}
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declare i32 @llvm.amdgcn.wave.reduce.umin.i32(i32, i32 immarg)
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