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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

65 lines
3.0 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=GFX908 %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=GFX90A %s
; Make sure we only use one 128-bit register instead of 2 for i128 asm
; constraints
define amdgpu_kernel void @s_input_output_i128() {
; GFX908-LABEL: name: s_input_output_i128
; GFX908: bb.0 (%ir-block.0):
; GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:SGPR_128, def %13
; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %13
; GFX908-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SGPR_128, [[COPY]]
; GFX908-NEXT: S_ENDPGM 0
;
; GFX90A-LABEL: name: s_input_output_i128
; GFX90A: bb.0 (%ir-block.0):
; GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:SGPR_128, def %11
; GFX90A-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %11
; GFX90A-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SGPR_128, [[COPY]]
; GFX90A-NEXT: S_ENDPGM 0
%val = tail call i128 asm sideeffect "; def $0", "=s"()
call void asm sideeffect "; use $0", "s"(i128 %val)
ret void
}
define amdgpu_kernel void @v_input_output_i128() {
; GFX908-LABEL: name: v_input_output_i128
; GFX908: bb.0 (%ir-block.0):
; GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_128, def %13
; GFX908-NEXT: [[COPY:%[0-9]+]]:vreg_128 = COPY %13
; GFX908-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_128, [[COPY]]
; GFX908-NEXT: S_ENDPGM 0
;
; GFX90A-LABEL: name: v_input_output_i128
; GFX90A: bb.0 (%ir-block.0):
; GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_128_Align2, def %11
; GFX90A-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY %11
; GFX90A-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_128_Align2, [[COPY]]
; GFX90A-NEXT: S_ENDPGM 0
%val = tail call i128 asm sideeffect "; def $0", "=v"()
call void asm sideeffect "; use $0", "v"(i128 %val)
ret void
}
define amdgpu_kernel void @a_input_output_i128() {
; GFX908-LABEL: name: a_input_output_i128
; GFX908: bb.0 (%ir-block.0):
; GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:AReg_128, def %13
; GFX908-NEXT: [[COPY:%[0-9]+]]:areg_128 = COPY %13
; GFX908-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128, [[COPY]]
; GFX908-NEXT: S_ENDPGM 0
;
; GFX90A-LABEL: name: a_input_output_i128
; GFX90A: bb.0 (%ir-block.0):
; GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:AReg_128_Align2, def %11
; GFX90A-NEXT: [[COPY:%[0-9]+]]:areg_128_align2 = COPY %11
; GFX90A-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, [[COPY]]
; GFX90A-NEXT: S_ENDPGM 0
%val = call i128 asm sideeffect "; def $0", "=a"()
call void asm sideeffect "; use $0", "a"(i128 %val)
ret void
}