derek.holloway
7502bf64a4
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62 lines
2.3 KiB
LLVM
62 lines
2.3 KiB
LLVM
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -amdgpu-enable-lower-module-lds=0 -show-mc-encoding < %s | FileCheck -check-prefixes=GCN %s
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -amdgpu-enable-lower-module-lds=0 -filetype=obj < %s | llvm-readobj -r --syms - | FileCheck -check-prefixes=ELF %s
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@lds.external = external unnamed_addr addrspace(3) global [0 x i32]
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@lds.defined = unnamed_addr addrspace(3) global [8 x i32] poison, align 8
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; ELF: Relocations [
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; ELF-NEXT: Section (3) .rel.text {
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; ELF-NEXT: 0x{{[0-9A-F]*}} R_AMDGPU_ABS32_LO lds.external
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; ELF-NEXT: 0x{{[0-9A-F]*}} R_AMDGPU_ABS32_LO lds.defined
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; ELF-NEXT: }
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; ELF-NEXT: ]
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; ELF: Symbol {
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; ELF: Name: lds.external
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; ELF-NEXT: Value: 0x4
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; ELF-NEXT: Size: 0
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; ELF-NEXT: Binding: Global (0x1)
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; ELF-NEXT: Type: Object (0x1)
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; ELF-NEXT: Other: 0
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; ELF-NEXT: Section: Processor Specific (0xFF00)
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; ELF-NEXT: }
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; ELF: Symbol {
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; ELF: Name: lds.defined
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; ELF-NEXT: Value: 0x8
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; ELF-NEXT: Size: 32
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; ELF-NEXT: Binding: Global (0x1)
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; ELF-NEXT: Type: Object (0x1)
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; ELF-NEXT: Other: 0
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; ELF-NEXT: Section: Processor Specific (0xFF00)
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; ELF-NEXT: }
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; GCN-LABEL: {{^}}test_basic:
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; GCN: v_mov_b32_e32 v1, lds.external@abs32@lo ; encoding: [0xff,0x02,0x02,0x7e,A,A,A,A]
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; GCN-NEXT: ; fixup A - offset: 4, value: lds.external@abs32@lo, kind: FK_Data_4{{$}}
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;
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; GCN: s_lshl2_add_u32 s0, s2, lds.defined@abs32@lo ; encoding: [0x02,0xff,0x80,0x97,A,A,A,A]
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; GCN-NEXT: ; fixup A - offset: 4, value: lds.defined@abs32@lo, kind: FK_Data_4{{$}}
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;
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; GCN: .globl lds.external
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; GCN: .amdgpu_lds lds.external, 0, 4
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; GCN: .globl lds.defined
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; GCN: .amdgpu_lds lds.defined, 32, 8
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define amdgpu_gs float @test_basic(i32 inreg %wave, i32 %arg1) #0 {
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main_body:
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%gep0 = getelementptr [0 x i32], ptr addrspace(3) @lds.external, i32 0, i32 %arg1
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%tmp = load i32, ptr addrspace(3) %gep0
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%gep1 = getelementptr [8 x i32], ptr addrspace(3) @lds.defined, i32 0, i32 %wave
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store i32 123, ptr addrspace(3) %gep1
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%r = bitcast i32 %tmp to float
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ret float %r
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}
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; Function Attrs: convergent nounwind readnone
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declare i64 @llvm.amdgcn.icmp.i64.i32(i32, i32, i32) #4
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attributes #0 = { "no-signed-zeros-fp-math"="true" }
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attributes #4 = { convergent nounwind readnone }
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