derek.holloway
7502bf64a4
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418 lines
18 KiB
LLVM
418 lines
18 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250 %s
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define void @buffer_fat_ptr_agent_atomic_add_noret_i32(ptr addrspace(7) inreg %ptr, i32 %val) {
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; GFX1250-LABEL: buffer_fat_ptr_agent_atomic_add_noret_i32:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_mov_b32 s6, s2
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; GFX1250-NEXT: s_mov_b32 s4, s0
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; GFX1250-NEXT: ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7
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; GFX1250-NEXT: s_mov_b32 s7, s3
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; GFX1250-NEXT: s_mov_b32 s8, s7
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; GFX1250-NEXT: s_mov_b32 s9, s6
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; GFX1250-NEXT: ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5
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; GFX1250-NEXT: s_mov_b32 s5, s1
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; GFX1250-NEXT: s_mov_b32 s10, s5
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; GFX1250-NEXT: s_mov_b32 s0, s4
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s10
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; GFX1250-NEXT: s_mov_b32 s2, s9
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; GFX1250-NEXT: s_mov_b32 s3, s8
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; GFX1250-NEXT: v_mov_b32_e32 v1, s16
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: buffer_atomic_add_u32 v0, v1, s[0:3], null offen
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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%unused = atomicrmw add ptr addrspace(7) %ptr, i32 %val syncscope("agent") monotonic
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ret void
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}
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define i32 @buffer_fat_ptr_agent_atomic_add_ret_i32(ptr addrspace(7) inreg %ptr, i32 %val) {
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; GFX1250-LABEL: buffer_fat_ptr_agent_atomic_add_ret_i32:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_mov_b32 s6, s2
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; GFX1250-NEXT: s_mov_b32 s4, s0
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; GFX1250-NEXT: ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7
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; GFX1250-NEXT: s_mov_b32 s7, s3
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; GFX1250-NEXT: s_mov_b32 s8, s7
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; GFX1250-NEXT: s_mov_b32 s9, s6
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; GFX1250-NEXT: ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5
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; GFX1250-NEXT: s_mov_b32 s5, s1
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; GFX1250-NEXT: s_mov_b32 s10, s5
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; GFX1250-NEXT: s_mov_b32 s0, s4
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s10
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; GFX1250-NEXT: s_mov_b32 s2, s9
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; GFX1250-NEXT: s_mov_b32 s3, s8
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; GFX1250-NEXT: v_mov_b32_e32 v1, s16
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: buffer_atomic_add_u32 v0, v1, s[0:3], null offen th:TH_ATOMIC_RETURN
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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%ret = atomicrmw add ptr addrspace(7) %ptr, i32 %val syncscope("agent") monotonic
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ret i32 %ret
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}
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define void @raw_buffer_atomic_add_v2f16_noret(<2 x half> %val, <4 x i32> inreg %rsrc, i32 %voffset, i32 inreg %soffset) {
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; GFX1250-LABEL: raw_buffer_atomic_add_v2f16_noret:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_mov_b32 s4, s3
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; GFX1250-NEXT: s_mov_b32 s5, s2
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; GFX1250-NEXT: s_mov_b32 s6, s1
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s6
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; GFX1250-NEXT: s_mov_b32 s2, s5
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; GFX1250-NEXT: s_mov_b32 s3, s4
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: buffer_atomic_pk_add_f16 v0, v1, s[0:3], s16 offen
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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%ret = call <2 x half> @llvm.amdgcn.raw.buffer.atomic.fadd.v2f16(<2 x half> %val, <4 x i32> %rsrc, i32 %voffset, i32 %soffset, i32 0)
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ret void
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}
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define <2 x half> @raw_buffer_atomic_add_v2f16_ret(<2 x half> %val, <4 x i32> inreg %rsrc, i32 %voffset, i32 inreg %soffset) {
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; GFX1250-LABEL: raw_buffer_atomic_add_v2f16_ret:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_mov_b32 s4, s3
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; GFX1250-NEXT: s_mov_b32 s5, s2
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; GFX1250-NEXT: s_mov_b32 s6, s1
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s6
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; GFX1250-NEXT: s_mov_b32 s2, s5
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; GFX1250-NEXT: s_mov_b32 s3, s4
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: buffer_atomic_pk_add_f16 v0, v1, s[0:3], s16 offen th:TH_ATOMIC_RETURN
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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%ret = call <2 x half> @llvm.amdgcn.raw.buffer.atomic.fadd.v2f16(<2 x half> %val, <4 x i32> %rsrc, i32 %voffset, i32 %soffset, i32 0)
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ret <2 x half> %ret
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}
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define float @struct_buffer_atomic_add_v2f16_ret(<2 x half> %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) {
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; GFX1250-LABEL: struct_buffer_atomic_add_v2f16_ret:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: scratch_store_b32 off, v2, s32 nv ; 4-byte Folded Spill
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: v_mov_b32_e32 v2, v1
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; GFX1250-NEXT: scratch_load_b32 v1, off, s32 nv ; 4-byte Folded Reload
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; GFX1250-NEXT: s_mov_b32 s4, s3
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; GFX1250-NEXT: s_mov_b32 s5, s2
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; GFX1250-NEXT: s_mov_b32 s6, s1
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s6
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; GFX1250-NEXT: s_mov_b32 s2, s5
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; GFX1250-NEXT: s_mov_b32 s3, s4
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; GFX1250-NEXT: ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: v_mov_b32_e32 v3, v1
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: buffer_atomic_pk_add_f16 v0, v[2:3], s[0:3], s16 idxen offen th:TH_ATOMIC_RETURN
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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%orig = call <2 x half> @llvm.amdgcn.struct.buffer.atomic.fadd.v2f16(<2 x half> %val, <4 x i32> %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)
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%r = bitcast <2 x half> %orig to float
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ret float %r
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}
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define void @struct_buffer_atomic_add_v2f16_noret(<2 x half> %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) {
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; GFX1250-LABEL: struct_buffer_atomic_add_v2f16_noret:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: scratch_store_b32 off, v2, s32 nv ; 4-byte Folded Spill
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: v_mov_b32_e32 v2, v1
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; GFX1250-NEXT: scratch_load_b32 v1, off, s32 nv ; 4-byte Folded Reload
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; GFX1250-NEXT: s_mov_b32 s4, s3
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; GFX1250-NEXT: s_mov_b32 s5, s2
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; GFX1250-NEXT: s_mov_b32 s6, s1
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s6
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; GFX1250-NEXT: s_mov_b32 s2, s5
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; GFX1250-NEXT: s_mov_b32 s3, s4
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; GFX1250-NEXT: ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: v_mov_b32_e32 v3, v1
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: buffer_atomic_pk_add_f16 v0, v[2:3], s[0:3], s16 idxen offen
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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%orig = call <2 x half> @llvm.amdgcn.struct.buffer.atomic.fadd.v2f16(<2 x half> %val, <4 x i32> %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)
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ret void
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}
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define void @raw_buffer_store_i32(<4 x i32> inreg %rsrc, i32 %v) {
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; GFX1250-LABEL: raw_buffer_store_i32:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_mov_b32 s4, s3
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; GFX1250-NEXT: s_mov_b32 s5, s2
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; GFX1250-NEXT: s_mov_b32 s6, s1
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s6
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; GFX1250-NEXT: s_mov_b32 s2, s5
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; GFX1250-NEXT: s_mov_b32 s3, s4
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; GFX1250-NEXT: buffer_store_b32 v0, off, s[0:3], null
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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call void @llvm.amdgcn.raw.buffer.store.i32(i32 %v, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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ret void
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}
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define void @raw_buffer_store_i32_volatile(<4 x i32> inreg %rsrc, i32 %v) {
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; GFX1250-LABEL: raw_buffer_store_i32_volatile:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_mov_b32 s4, s3
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; GFX1250-NEXT: s_mov_b32 s5, s2
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; GFX1250-NEXT: s_mov_b32 s6, s1
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s6
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; GFX1250-NEXT: s_mov_b32 s2, s5
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; GFX1250-NEXT: s_mov_b32 s3, s4
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: buffer_store_b32 v0, off, s[0:3], null scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_storecnt 0x0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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call void @llvm.amdgcn.raw.buffer.store.i32(i32 %v, <4 x i32> %rsrc, i32 0, i32 0, i32 2147483648)
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ret void
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}
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define void @struct_buffer_store_i32(<4 x i32> inreg %rsrc, i32 %v) {
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; GFX1250-LABEL: struct_buffer_store_i32:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_mov_b32 s4, s3
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; GFX1250-NEXT: s_mov_b32 s5, s2
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; GFX1250-NEXT: s_mov_b32 s6, s1
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s6
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; GFX1250-NEXT: s_mov_b32 s2, s5
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; GFX1250-NEXT: s_mov_b32 s3, s4
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; GFX1250-NEXT: v_mov_b32_e32 v1, 0
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; GFX1250-NEXT: buffer_store_b32 v0, v1, s[0:3], null idxen
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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call void @llvm.amdgcn.struct.buffer.store.i32(i32 %v, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
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ret void
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}
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define void @struct_buffer_store_i32_volatile(<4 x i32> inreg %rsrc, i32 %v) {
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; GFX1250-LABEL: struct_buffer_store_i32_volatile:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_mov_b32 s4, s3
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; GFX1250-NEXT: s_mov_b32 s5, s2
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; GFX1250-NEXT: s_mov_b32 s6, s1
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s6
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; GFX1250-NEXT: s_mov_b32 s2, s5
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; GFX1250-NEXT: s_mov_b32 s3, s4
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; GFX1250-NEXT: v_mov_b32_e32 v1, 0
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; GFX1250-NEXT: s_wait_xcnt 0x0
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; GFX1250-NEXT: buffer_store_b32 v0, v1, s[0:3], null idxen scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_storecnt 0x0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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call void @llvm.amdgcn.struct.buffer.store.i32(i32 %v, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 2147483648)
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ret void
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}
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define i32 @raw_buffer_load_i32(<4 x i32> inreg %rsrc, i32 %v) {
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; GFX1250-LABEL: raw_buffer_load_i32:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_mov_b32 s4, s3
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; GFX1250-NEXT: s_mov_b32 s5, s2
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; GFX1250-NEXT: s_mov_b32 s6, s1
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; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
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; GFX1250-NEXT: s_mov_b32 s1, s6
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; GFX1250-NEXT: s_mov_b32 s2, s5
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; GFX1250-NEXT: s_mov_b32 s3, s4
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; GFX1250-NEXT: buffer_load_b32 v0, off, s[0:3], null
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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%val = call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> %rsrc, i32 0, i32 0, i32 0)
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ret i32 %val
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}
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; FIXME?: Compiler strips volatile bit during lowering, we cannot emit volatile buffer loads this way.
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define i32 @raw_buffer_load_i32_volatile(<4 x i32> inreg %rsrc, i32 %v) {
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; GFX1250-LABEL: raw_buffer_load_i32_volatile:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
|
|
; GFX1250-NEXT: s_mov_b32 s4, s3
|
|
; GFX1250-NEXT: s_mov_b32 s5, s2
|
|
; GFX1250-NEXT: s_mov_b32 s6, s1
|
|
; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
|
|
; GFX1250-NEXT: s_mov_b32 s1, s6
|
|
; GFX1250-NEXT: s_mov_b32 s2, s5
|
|
; GFX1250-NEXT: s_mov_b32 s3, s4
|
|
; GFX1250-NEXT: buffer_load_b32 v0, off, s[0:3], null
|
|
; GFX1250-NEXT: s_wait_loadcnt 0x0
|
|
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
|
|
%val = call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> %rsrc, i32 0, i32 0, i32 21474836480)
|
|
ret i32 %val
|
|
}
|
|
|
|
define i32 @struct_buffer_load_i32(<4 x i32> inreg %rsrc, i32 %v) {
|
|
; GFX1250-LABEL: struct_buffer_load_i32:
|
|
; GFX1250: ; %bb.0:
|
|
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX1250-NEXT: s_wait_kmcnt 0x0
|
|
; GFX1250-NEXT: s_mov_b32 s4, s3
|
|
; GFX1250-NEXT: s_mov_b32 s5, s2
|
|
; GFX1250-NEXT: s_mov_b32 s6, s1
|
|
; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
|
|
; GFX1250-NEXT: s_mov_b32 s1, s6
|
|
; GFX1250-NEXT: s_mov_b32 s2, s5
|
|
; GFX1250-NEXT: s_mov_b32 s3, s4
|
|
; GFX1250-NEXT: v_mov_b32_e32 v0, 0
|
|
; GFX1250-NEXT: buffer_load_b32 v0, v0, s[0:3], null idxen
|
|
; GFX1250-NEXT: s_wait_loadcnt 0x0
|
|
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
|
|
%val = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
ret i32 %val
|
|
}
|
|
|
|
; FIXME?: Compiler strips volatile bit during lowering, we cannot emit volatile buffer loads this way.
|
|
define i32 @struct_buffer_load_i32_volatile(<4 x i32> inreg %rsrc, i32 %v) {
|
|
; GFX1250-LABEL: struct_buffer_load_i32_volatile:
|
|
; GFX1250: ; %bb.0:
|
|
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX1250-NEXT: s_wait_kmcnt 0x0
|
|
; GFX1250-NEXT: s_mov_b32 s4, s3
|
|
; GFX1250-NEXT: s_mov_b32 s5, s2
|
|
; GFX1250-NEXT: s_mov_b32 s6, s1
|
|
; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
|
|
; GFX1250-NEXT: s_mov_b32 s1, s6
|
|
; GFX1250-NEXT: s_mov_b32 s2, s5
|
|
; GFX1250-NEXT: s_mov_b32 s3, s4
|
|
; GFX1250-NEXT: v_mov_b32_e32 v0, 0
|
|
; GFX1250-NEXT: buffer_load_b32 v0, v0, s[0:3], null idxen
|
|
; GFX1250-NEXT: s_wait_loadcnt 0x0
|
|
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
|
|
%val = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 21474836480)
|
|
ret i32 %val
|
|
}
|
|
|
|
define void @buffer_fat_ptr_store_i32(ptr addrspace(7) inreg %ptr, i32 %val) {
|
|
; GFX1250-LABEL: buffer_fat_ptr_store_i32:
|
|
; GFX1250: ; %bb.0:
|
|
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX1250-NEXT: s_wait_kmcnt 0x0
|
|
; GFX1250-NEXT: s_mov_b32 s6, s2
|
|
; GFX1250-NEXT: s_mov_b32 s4, s0
|
|
; GFX1250-NEXT: ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7
|
|
; GFX1250-NEXT: s_mov_b32 s7, s3
|
|
; GFX1250-NEXT: s_mov_b32 s8, s7
|
|
; GFX1250-NEXT: s_mov_b32 s9, s6
|
|
; GFX1250-NEXT: ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5
|
|
; GFX1250-NEXT: s_mov_b32 s5, s1
|
|
; GFX1250-NEXT: s_mov_b32 s10, s5
|
|
; GFX1250-NEXT: s_mov_b32 s0, s4
|
|
; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
|
|
; GFX1250-NEXT: s_mov_b32 s1, s10
|
|
; GFX1250-NEXT: s_mov_b32 s2, s9
|
|
; GFX1250-NEXT: s_mov_b32 s3, s8
|
|
; GFX1250-NEXT: v_mov_b32_e32 v1, s16
|
|
; GFX1250-NEXT: buffer_store_b32 v0, v1, s[0:3], null offen
|
|
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
|
|
store i32 %val, ptr addrspace(7) %ptr
|
|
ret void
|
|
}
|
|
|
|
define void @buffer_fat_ptr_store_i32_volatile(ptr addrspace(7) inreg %ptr, i32 %val) {
|
|
; GFX1250-LABEL: buffer_fat_ptr_store_i32_volatile:
|
|
; GFX1250: ; %bb.0:
|
|
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX1250-NEXT: s_wait_kmcnt 0x0
|
|
; GFX1250-NEXT: s_mov_b32 s6, s2
|
|
; GFX1250-NEXT: s_mov_b32 s4, s0
|
|
; GFX1250-NEXT: ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7
|
|
; GFX1250-NEXT: s_mov_b32 s7, s3
|
|
; GFX1250-NEXT: s_mov_b32 s8, s7
|
|
; GFX1250-NEXT: s_mov_b32 s9, s6
|
|
; GFX1250-NEXT: ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5
|
|
; GFX1250-NEXT: s_mov_b32 s5, s1
|
|
; GFX1250-NEXT: s_mov_b32 s10, s5
|
|
; GFX1250-NEXT: s_mov_b32 s0, s4
|
|
; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
|
|
; GFX1250-NEXT: s_mov_b32 s1, s10
|
|
; GFX1250-NEXT: s_mov_b32 s2, s9
|
|
; GFX1250-NEXT: s_mov_b32 s3, s8
|
|
; GFX1250-NEXT: v_mov_b32_e32 v1, s16
|
|
; GFX1250-NEXT: s_wait_xcnt 0x0
|
|
; GFX1250-NEXT: buffer_store_b32 v0, v1, s[0:3], null offen scope:SCOPE_SYS
|
|
; GFX1250-NEXT: s_wait_storecnt 0x0
|
|
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
|
|
store volatile i32 %val, ptr addrspace(7) %ptr
|
|
ret void
|
|
}
|
|
|
|
define i32 @buffer_fat_ptr_load_i32(ptr addrspace(7) inreg %ptr) {
|
|
; GFX1250-LABEL: buffer_fat_ptr_load_i32:
|
|
; GFX1250: ; %bb.0:
|
|
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX1250-NEXT: s_wait_kmcnt 0x0
|
|
; GFX1250-NEXT: s_mov_b32 s6, s2
|
|
; GFX1250-NEXT: s_mov_b32 s4, s0
|
|
; GFX1250-NEXT: ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7
|
|
; GFX1250-NEXT: s_mov_b32 s7, s3
|
|
; GFX1250-NEXT: s_mov_b32 s8, s7
|
|
; GFX1250-NEXT: s_mov_b32 s9, s6
|
|
; GFX1250-NEXT: ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5
|
|
; GFX1250-NEXT: s_mov_b32 s5, s1
|
|
; GFX1250-NEXT: s_mov_b32 s10, s5
|
|
; GFX1250-NEXT: s_mov_b32 s0, s4
|
|
; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
|
|
; GFX1250-NEXT: s_mov_b32 s1, s10
|
|
; GFX1250-NEXT: s_mov_b32 s2, s9
|
|
; GFX1250-NEXT: s_mov_b32 s3, s8
|
|
; GFX1250-NEXT: v_mov_b32_e32 v0, s16
|
|
; GFX1250-NEXT: buffer_load_b32 v0, v0, s[0:3], null offen
|
|
; GFX1250-NEXT: s_wait_loadcnt 0x0
|
|
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
|
|
%val = load i32, ptr addrspace(7) %ptr
|
|
ret i32 %val
|
|
}
|
|
|
|
define i32 @buffer_fat_ptr_load_i32_volatile(ptr addrspace(7) inreg %ptr) {
|
|
; GFX1250-LABEL: buffer_fat_ptr_load_i32_volatile:
|
|
; GFX1250: ; %bb.0:
|
|
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX1250-NEXT: s_wait_kmcnt 0x0
|
|
; GFX1250-NEXT: s_mov_b32 s6, s2
|
|
; GFX1250-NEXT: s_mov_b32 s4, s0
|
|
; GFX1250-NEXT: ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7
|
|
; GFX1250-NEXT: s_mov_b32 s7, s3
|
|
; GFX1250-NEXT: s_mov_b32 s8, s7
|
|
; GFX1250-NEXT: s_mov_b32 s9, s6
|
|
; GFX1250-NEXT: ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5
|
|
; GFX1250-NEXT: s_mov_b32 s5, s1
|
|
; GFX1250-NEXT: s_mov_b32 s10, s5
|
|
; GFX1250-NEXT: s_mov_b32 s0, s4
|
|
; GFX1250-NEXT: ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1_sgpr2_sgpr3
|
|
; GFX1250-NEXT: s_mov_b32 s1, s10
|
|
; GFX1250-NEXT: s_mov_b32 s2, s9
|
|
; GFX1250-NEXT: s_mov_b32 s3, s8
|
|
; GFX1250-NEXT: v_mov_b32_e32 v0, s16
|
|
; GFX1250-NEXT: s_wait_xcnt 0x0
|
|
; GFX1250-NEXT: buffer_load_b32 v0, v0, s[0:3], null offen scope:SCOPE_SYS
|
|
; GFX1250-NEXT: s_wait_loadcnt 0x0
|
|
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
|
|
%val = load volatile i32, ptr addrspace(7) %ptr
|
|
ret i32 %val
|
|
}
|