derek.holloway
7502bf64a4
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28 lines
1.4 KiB
LLVM
28 lines
1.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GCN %s
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@L = external local_unnamed_addr addrspace(3) global [9 x double], align 16
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@Ldisp = external local_unnamed_addr addrspace(3) global [96 x double], align 16
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; Stores are reordered during loads merge. This case used to assert while
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; scanning for a paired instruction because it used to expect paired one
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; to follow a base one.
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; GCN-LABEL: {{^}}out_of_order_merge:
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; GCN-COUNT2: ds_read2_b64
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; GCN-COUNT3: ds_write_b64
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define amdgpu_kernel void @out_of_order_merge() {
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entry:
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%gep2 = getelementptr inbounds [96 x double], ptr addrspace(3) @Ldisp, i32 0, i32 1
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%tmp12 = load <2 x double>, ptr addrspace(3) getelementptr inbounds ([9 x double], ptr addrspace(3) @L, i32 0, i32 1), align 8
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%tmp14 = extractelement <2 x double> %tmp12, i32 0
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%tmp15 = extractelement <2 x double> %tmp12, i32 1
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%add50.i = fadd double %tmp14, %tmp15
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store double %add50.i, ptr addrspace(3) @Ldisp, align 8
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%tmp16 = load double, ptr addrspace(3) getelementptr inbounds ([9 x double], ptr addrspace(3) @L, i32 1, i32 0), align 8
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store double %tmp16, ptr addrspace(3) %gep2, align 8
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%tmp17 = load <2 x double>, ptr addrspace(3) getelementptr inbounds ([9 x double], ptr addrspace(3) @L, i32 2, i32 1), align 8
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%tmp19 = extractelement <2 x double> %tmp17, i32 1
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store double %tmp19, ptr addrspace(3) poison, align 8
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ret void
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}
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