derek.holloway
7502bf64a4
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820 lines
32 KiB
LLVM
820 lines
32 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 -new-reg-bank-select < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=fiji -new-reg-bank-select < %s | FileCheck -check-prefixes=GCN-GISEL %s
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; TODO: GlobalISel should avoid generating v_ldexp_f32.
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define amdgpu_cs float @v_s_exp_f32(float inreg %src) {
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; GFX12-SDAG-LABEL: v_s_exp_f32:
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; GFX12-SDAG: ; %bb.0:
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; GFX12-SDAG-NEXT: s_cmp_lt_f32 s0, 0xc2fc0000
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; GFX12-SDAG-NEXT: s_cselect_b32 s1, 0x42800000, 0
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; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
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; GFX12-SDAG-NEXT: s_add_f32 s0, s0, s1
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; GFX12-SDAG-NEXT: s_cselect_b32 s1, 0x1f800000, 1.0
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; GFX12-SDAG-NEXT: v_s_exp_f32 s0, s0
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; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
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; GFX12-SDAG-NEXT: s_mul_f32 s0, s0, s1
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; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
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; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-SDAG-NEXT: ; return to shader part epilog
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;
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; GFX12-GISEL-LABEL: v_s_exp_f32:
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; GFX12-GISEL: ; %bb.0:
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; GFX12-GISEL-NEXT: s_cmp_lt_f32 s0, 0xc2fc0000
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; GFX12-GISEL-NEXT: s_cselect_b32 s1, 0x42800000, 0
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; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
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; GFX12-GISEL-NEXT: s_add_f32 s0, s0, s1
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; GFX12-GISEL-NEXT: s_cselect_b32 s1, 0xffffffc0, 0
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; GFX12-GISEL-NEXT: v_s_exp_f32 s0, s0
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; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
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; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
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; GFX12-GISEL-NEXT: v_ldexp_f32 v0, s0, s1
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; GFX12-GISEL-NEXT: ; return to shader part epilog
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;
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; GCN-GISEL-LABEL: v_s_exp_f32:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc0000
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; GCN-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0
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; GCN-GISEL-NEXT: s_cmp_lg_u64 vcc, 0
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; GCN-GISEL-NEXT: s_cselect_b32 s1, 0x42800000, 0
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; GCN-GISEL-NEXT: v_mov_b32_e32 v0, s1
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; GCN-GISEL-NEXT: v_add_f32_e32 v0, s0, v0
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; GCN-GISEL-NEXT: v_exp_f32_e32 v0, v0
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; GCN-GISEL-NEXT: s_cselect_b32 s0, 0xffffffc0, 0
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; GCN-GISEL-NEXT: v_ldexp_f32 v0, v0, s0
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; GCN-GISEL-NEXT: ; return to shader part epilog
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%result = call float @llvm.exp2.f32(float %src)
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ret float %result
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}
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define amdgpu_cs half @v_s_exp_f16(half inreg %src) {
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; GFX12-SDAG-LABEL: v_s_exp_f16:
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; GFX12-SDAG: ; %bb.0:
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; GFX12-SDAG-NEXT: v_s_exp_f16 s0, s0
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; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
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; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
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; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-SDAG-NEXT: ; return to shader part epilog
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;
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; GFX12-GISEL-LABEL: v_s_exp_f16:
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; GFX12-GISEL: ; %bb.0:
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; GFX12-GISEL-NEXT: v_exp_f16_e32 v0.l, s0
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; GFX12-GISEL-NEXT: ; return to shader part epilog
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;
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; GCN-GISEL-LABEL: v_s_exp_f16:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: v_exp_f16_e32 v0, s0
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; GCN-GISEL-NEXT: ; return to shader part epilog
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%result = call half @llvm.exp2.f16(half %src)
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ret half %result
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}
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define amdgpu_cs float @v_s_amdgcn_exp_f32(float inreg %src) {
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; GFX12-LABEL: v_s_amdgcn_exp_f32:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: v_s_exp_f32 s0, s0
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; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
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; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: ; return to shader part epilog
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;
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; GCN-GISEL-LABEL: v_s_amdgcn_exp_f32:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: v_exp_f32_e32 v0, s0
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; GCN-GISEL-NEXT: ; return to shader part epilog
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%result = call float @llvm.amdgcn.exp2.f32(float %src)
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ret float %result
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}
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define amdgpu_cs half @v_s_amdgcn_exp_f16(half inreg %src) {
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; GFX12-LABEL: v_s_amdgcn_exp_f16:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: v_s_exp_f16 s0, s0
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; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
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; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: ; return to shader part epilog
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;
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; GCN-GISEL-LABEL: v_s_amdgcn_exp_f16:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: v_exp_f16_e32 v0, s0
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; GCN-GISEL-NEXT: ; return to shader part epilog
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%result = call half @llvm.amdgcn.exp2.f16(half %src)
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ret half %result
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}
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define amdgpu_cs float @v_s_log_f32(float inreg %src) {
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; GFX12-SDAG-LABEL: v_s_log_f32:
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; GFX12-SDAG: ; %bb.0:
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; GFX12-SDAG-NEXT: s_cmp_lt_f32 s0, 0x800000
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; GFX12-SDAG-NEXT: s_cselect_b32 s1, 0x4f800000, 1.0
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; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
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; GFX12-SDAG-NEXT: s_mul_f32 s0, s0, s1
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; GFX12-SDAG-NEXT: s_cselect_b32 s1, 0x42000000, 0
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; GFX12-SDAG-NEXT: v_s_log_f32 s0, s0
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; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
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; GFX12-SDAG-NEXT: s_sub_f32 s0, s0, s1
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; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
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; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-SDAG-NEXT: ; return to shader part epilog
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;
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; GFX12-GISEL-LABEL: v_s_log_f32:
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; GFX12-GISEL: ; %bb.0:
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; GFX12-GISEL-NEXT: s_cmp_lt_f32 s0, 0x800000
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; GFX12-GISEL-NEXT: s_cselect_b32 s2, 1, 0
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; GFX12-GISEL-NEXT: s_cselect_b32 s1, 1, 0
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; GFX12-GISEL-NEXT: s_lshl_b32 s2, s2, 5
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; GFX12-GISEL-NEXT: s_cmp_lg_u32 s1, 0
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; GFX12-GISEL-NEXT: v_ldexp_f32 v0, s0, s2
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; GFX12-GISEL-NEXT: s_cselect_b32 s1, 0x42000000, 0
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; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
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; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v0
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; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
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; GFX12-GISEL-NEXT: v_s_log_f32 s0, s0
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; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
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; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
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; GFX12-GISEL-NEXT: s_sub_f32 s0, s0, s1
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; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
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; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-GISEL-NEXT: ; return to shader part epilog
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;
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; GCN-GISEL-LABEL: v_s_log_f32:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
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; GCN-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0
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; GCN-GISEL-NEXT: s_cmp_lg_u64 vcc, 0
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; GCN-GISEL-NEXT: s_cselect_b32 s2, 1, 0
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; GCN-GISEL-NEXT: s_cselect_b32 s1, 1, 0
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; GCN-GISEL-NEXT: s_lshl_b32 s2, s2, 5
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; GCN-GISEL-NEXT: v_mov_b32_e32 v0, s2
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; GCN-GISEL-NEXT: v_ldexp_f32 v0, s0, v0
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; GCN-GISEL-NEXT: v_log_f32_e32 v0, v0
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; GCN-GISEL-NEXT: s_cmp_lg_u32 s1, 0
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; GCN-GISEL-NEXT: s_cselect_b32 s0, 0x42000000, 0
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; GCN-GISEL-NEXT: v_subrev_f32_e32 v0, s0, v0
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; GCN-GISEL-NEXT: ; return to shader part epilog
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%result = call float @llvm.log2.f32(float %src)
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ret float %result
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}
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define amdgpu_cs half @v_s_log_f16(half inreg %src) {
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; GFX12-SDAG-LABEL: v_s_log_f16:
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; GFX12-SDAG: ; %bb.0:
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; GFX12-SDAG-NEXT: v_s_log_f16 s0, s0
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; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
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; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
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; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-SDAG-NEXT: ; return to shader part epilog
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;
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; GFX12-GISEL-LABEL: v_s_log_f16:
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; GFX12-GISEL: ; %bb.0:
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; GFX12-GISEL-NEXT: v_log_f16_e32 v0.l, s0
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; GFX12-GISEL-NEXT: ; return to shader part epilog
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;
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; GCN-GISEL-LABEL: v_s_log_f16:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: v_log_f16_e32 v0, s0
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; GCN-GISEL-NEXT: ; return to shader part epilog
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%result = call half @llvm.log2.f16(half %src)
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ret half %result
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}
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define amdgpu_cs float @v_s_amdgcn_log_f32(float inreg %src) {
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; GFX12-LABEL: v_s_amdgcn_log_f32:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: v_s_log_f32 s0, s0
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; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
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; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: ; return to shader part epilog
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;
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; GCN-GISEL-LABEL: v_s_amdgcn_log_f32:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: v_log_f32_e32 v0, s0
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; GCN-GISEL-NEXT: ; return to shader part epilog
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%result = call float @llvm.amdgcn.log.f32(float %src)
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ret float %result
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}
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define amdgpu_cs half @v_s_amdgcn_log_f16(half inreg %src) {
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; GFX12-LABEL: v_s_amdgcn_log_f16:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: v_s_log_f16 s0, s0
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; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
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; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: ; return to shader part epilog
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;
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; GCN-GISEL-LABEL: v_s_amdgcn_log_f16:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: v_log_f16_e32 v0, s0
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; GCN-GISEL-NEXT: ; return to shader part epilog
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%result = call half @llvm.amdgcn.log.f16(half %src)
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ret half %result
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}
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define void @v_amdgcn_log_f16_div(half %src, ptr addrspace(1) %out) {
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; GFX12-LABEL: v_amdgcn_log_f16_div:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_log_f16_e32 v0.l, v0.l
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; GFX12-NEXT: global_store_b16 v[1:2], v0, off
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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;
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; GCN-GISEL-LABEL: v_amdgcn_log_f16_div:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-GISEL-NEXT: v_log_f16_e32 v0, v0
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; GCN-GISEL-NEXT: flat_store_short v[1:2], v0
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; GCN-GISEL-NEXT: s_waitcnt vmcnt(0)
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; GCN-GISEL-NEXT: s_setpc_b64 s[30:31]
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%result = call half @llvm.amdgcn.log.f16(half %src)
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store half %result, ptr addrspace(1) %out
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ret void
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}
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define void @v_amdgcn_log_f32_div(float %src, ptr addrspace(1) %out) {
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; GFX12-LABEL: v_amdgcn_log_f32_div:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_log_f32_e32 v0, v0
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; GFX12-NEXT: global_store_b32 v[1:2], v0, off
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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;
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; GCN-GISEL-LABEL: v_amdgcn_log_f32_div:
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; GCN-GISEL: ; %bb.0:
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; GCN-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-GISEL-NEXT: v_log_f32_e32 v0, v0
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; GCN-GISEL-NEXT: flat_store_dword v[1:2], v0
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; GCN-GISEL-NEXT: s_waitcnt vmcnt(0)
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; GCN-GISEL-NEXT: s_setpc_b64 s[30:31]
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%result = call float @llvm.amdgcn.log.f32(float %src)
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store float %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_cs float @v_s_rcp_f32(float inreg %src) {
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; GFX12-LABEL: v_s_rcp_f32:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: v_s_rcp_f32 s0, s0
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; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
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; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: ; return to shader part epilog
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;
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; GCN-GISEL-LABEL: v_s_rcp_f32:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_rcp_f32_e32 v0, s0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%result = call fast float @llvm.amdgcn.rcp.f32(float %src)
|
|
ret float %result
|
|
}
|
|
|
|
define amdgpu_cs half @v_s_rcp_f16(half inreg %src) {
|
|
; GFX12-LABEL: v_s_rcp_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: v_s_rcp_f16 s0, s0
|
|
; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
|
|
; GFX12-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: v_s_rcp_f16:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_rcp_f16_e32 v0, s0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%result = call fast half @llvm.amdgcn.rcp.f16(half %src)
|
|
ret half %result
|
|
}
|
|
|
|
define void @v_rcp_f16_div(half %src, ptr addrspace(1) %out) {
|
|
; GFX12-LABEL: v_rcp_f16_div:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX12-NEXT: s_wait_expcnt 0x0
|
|
; GFX12-NEXT: s_wait_samplecnt 0x0
|
|
; GFX12-NEXT: s_wait_bvhcnt 0x0
|
|
; GFX12-NEXT: s_wait_kmcnt 0x0
|
|
; GFX12-NEXT: v_rcp_f16_e32 v0.l, v0.l
|
|
; GFX12-NEXT: global_store_b16 v[1:2], v0, off
|
|
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GCN-GISEL-LABEL: v_rcp_f16_div:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GCN-GISEL-NEXT: v_rcp_f16_e32 v0, v0
|
|
; GCN-GISEL-NEXT: flat_store_short v[1:2], v0
|
|
; GCN-GISEL-NEXT: s_waitcnt vmcnt(0)
|
|
; GCN-GISEL-NEXT: s_setpc_b64 s[30:31]
|
|
%result = call half @llvm.amdgcn.rcp.f16(half %src)
|
|
store half %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define void @v_rcp_f32_div(float %src, ptr addrspace(1) %out) {
|
|
; GFX12-LABEL: v_rcp_f32_div:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX12-NEXT: s_wait_expcnt 0x0
|
|
; GFX12-NEXT: s_wait_samplecnt 0x0
|
|
; GFX12-NEXT: s_wait_bvhcnt 0x0
|
|
; GFX12-NEXT: s_wait_kmcnt 0x0
|
|
; GFX12-NEXT: v_rcp_f32_e32 v0, v0
|
|
; GFX12-NEXT: global_store_b32 v[1:2], v0, off
|
|
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GCN-GISEL-LABEL: v_rcp_f32_div:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GCN-GISEL-NEXT: v_rcp_f32_e32 v0, v0
|
|
; GCN-GISEL-NEXT: flat_store_dword v[1:2], v0
|
|
; GCN-GISEL-NEXT: s_waitcnt vmcnt(0)
|
|
; GCN-GISEL-NEXT: s_setpc_b64 s[30:31]
|
|
%result = call float @llvm.amdgcn.rcp.f32(float %src)
|
|
store float %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define void @v_rcp_f64_div(double %src, ptr addrspace(1) %out) {
|
|
; GFX12-LABEL: v_rcp_f64_div:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX12-NEXT: s_wait_expcnt 0x0
|
|
; GFX12-NEXT: s_wait_samplecnt 0x0
|
|
; GFX12-NEXT: s_wait_bvhcnt 0x0
|
|
; GFX12-NEXT: s_wait_kmcnt 0x0
|
|
; GFX12-NEXT: v_rcp_f64_e32 v[0:1], v[0:1]
|
|
; GFX12-NEXT: global_store_b64 v[2:3], v[0:1], off
|
|
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GCN-GISEL-LABEL: v_rcp_f64_div:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GCN-GISEL-NEXT: v_rcp_f64_e32 v[0:1], v[0:1]
|
|
; GCN-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
|
|
; GCN-GISEL-NEXT: s_waitcnt vmcnt(0)
|
|
; GCN-GISEL-NEXT: s_setpc_b64 s[30:31]
|
|
%result = call double @llvm.amdgcn.rcp.f64(double %src)
|
|
store double %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_cs double @v_s_rcp_f64(double inreg %src) {
|
|
; GFX12-LABEL: v_s_rcp_f64:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: v_rcp_f64_e32 v[0:1], s[0:1]
|
|
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
|
|
; GFX12-NEXT: v_readfirstlane_b32 s0, v0
|
|
; GFX12-NEXT: v_readfirstlane_b32 s1, v1
|
|
; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: v_s_rcp_f64:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_rcp_f64_e32 v[0:1], s[0:1]
|
|
; GCN-GISEL-NEXT: v_readfirstlane_b32 s0, v0
|
|
; GCN-GISEL-NEXT: v_readfirstlane_b32 s1, v1
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%result = call double @llvm.amdgcn.rcp.f64(double %src)
|
|
ret double %result
|
|
}
|
|
|
|
; TODO: GlobalISel should generate v_s_rsq.
|
|
define amdgpu_cs float @v_s_rsq_f32(float inreg %src) {
|
|
; GFX12-SDAG-LABEL: v_s_rsq_f32:
|
|
; GFX12-SDAG: ; %bb.0:
|
|
; GFX12-SDAG-NEXT: v_s_rsq_f32 s0, s0
|
|
; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
|
|
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-SDAG-NEXT: ; return to shader part epilog
|
|
;
|
|
; GFX12-GISEL-LABEL: v_s_rsq_f32:
|
|
; GFX12-GISEL: ; %bb.0:
|
|
; GFX12-GISEL-NEXT: v_s_sqrt_f32 s0, s0
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1)
|
|
; GFX12-GISEL-NEXT: v_s_rcp_f32 s0, s0
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-GISEL-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: v_s_rsq_f32:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_sqrt_f32_e32 v0, s0
|
|
; GCN-GISEL-NEXT: v_rcp_f32_e32 v0, v0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%sqrt = call fast float @llvm.sqrt.f32(float %src)
|
|
%fdiv = fdiv fast float 1.0, %sqrt
|
|
ret float %fdiv
|
|
}
|
|
|
|
define amdgpu_cs half @v_s_rsq_f16(half inreg %src) {
|
|
; GFX12-LABEL: v_s_rsq_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: v_s_rsq_f16 s0, s0
|
|
; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
|
|
; GFX12-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: v_s_rsq_f16:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_rsq_f16_e32 v0, s0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%sqrt = call fast half @llvm.sqrt.f16(half %src)
|
|
%result = fdiv fast half 1.0, %sqrt
|
|
ret half %result
|
|
}
|
|
|
|
; TODO: Should avoid generating v_cmp_class_f32.
|
|
define amdgpu_cs float @v_s_sqrt_f32(float inreg %src) {
|
|
; GFX12-SDAG-LABEL: v_s_sqrt_f32:
|
|
; GFX12-SDAG: ; %bb.0:
|
|
; GFX12-SDAG-NEXT: s_mul_f32 s1, s0, 0x4f800000
|
|
; GFX12-SDAG-NEXT: s_cmp_lt_f32 s0, 0xf800000
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
|
|
; GFX12-SDAG-NEXT: s_cselect_b32 s1, s1, s0
|
|
; GFX12-SDAG-NEXT: v_s_sqrt_f32 s2, s1
|
|
; GFX12-SDAG-NEXT: s_mov_b32 s4, s1
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
|
|
; GFX12-SDAG-NEXT: s_add_co_i32 s3, s2, -1
|
|
; GFX12-SDAG-NEXT: s_xor_b32 s5, s3, 0x80000000
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
|
|
; GFX12-SDAG-NEXT: s_fmac_f32 s4, s5, s2
|
|
; GFX12-SDAG-NEXT: s_mov_b32 s5, s1
|
|
; GFX12-SDAG-NEXT: s_cmp_le_f32 s4, 0
|
|
; GFX12-SDAG-NEXT: s_cselect_b32 s3, s3, s2
|
|
; GFX12-SDAG-NEXT: s_add_co_i32 s4, s2, 1
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
|
|
; GFX12-SDAG-NEXT: s_xor_b32 s6, s4, 0x80000000
|
|
; GFX12-SDAG-NEXT: s_fmac_f32 s5, s6, s2
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
|
|
; GFX12-SDAG-NEXT: s_cmp_gt_f32 s5, 0
|
|
; GFX12-SDAG-NEXT: s_cselect_b32 s2, s4, s3
|
|
; GFX12-SDAG-NEXT: s_cmp_lt_f32 s0, 0xf800000
|
|
; GFX12-SDAG-NEXT: s_mul_f32 s0, s2, 0x37800000
|
|
; GFX12-SDAG-NEXT: v_cmp_class_f32_e64 s3, s1, 0x260
|
|
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
|
; GFX12-SDAG-NEXT: s_cselect_b32 s0, s0, s2
|
|
; GFX12-SDAG-NEXT: s_and_b32 s2, s3, exec_lo
|
|
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-SDAG-NEXT: s_cselect_b32 s0, s1, s0
|
|
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-SDAG-NEXT: ; return to shader part epilog
|
|
;
|
|
; GFX12-GISEL-LABEL: v_s_sqrt_f32:
|
|
; GFX12-GISEL: ; %bb.0:
|
|
; GFX12-GISEL-NEXT: s_cmp_lt_f32 s0, 0xf800000
|
|
; GFX12-GISEL-NEXT: s_mul_f32 s2, s0, 0x4f800000
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s1, 1, 0
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s0, s2, s0
|
|
; GFX12-GISEL-NEXT: v_s_sqrt_f32 s2, s0
|
|
; GFX12-GISEL-NEXT: s_mov_b32 s4, s0
|
|
; GFX12-GISEL-NEXT: s_mov_b32 s6, s0
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
|
|
; GFX12-GISEL-NEXT: s_add_co_i32 s3, s2, -1
|
|
; GFX12-GISEL-NEXT: s_xor_b32 s5, s3, 0x80000000
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
|
|
; GFX12-GISEL-NEXT: s_fmac_f32 s4, s5, s2
|
|
; GFX12-GISEL-NEXT: s_add_co_i32 s5, s2, 1
|
|
; GFX12-GISEL-NEXT: s_xor_b32 s7, s5, 0x80000000
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_2)
|
|
; GFX12-GISEL-NEXT: s_cmp_le_f32 s4, 0
|
|
; GFX12-GISEL-NEXT: s_fmac_f32 s6, s7, s2
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s2, s3, s2
|
|
; GFX12-GISEL-NEXT: s_cmp_gt_f32 s6, 0
|
|
; GFX12-GISEL-NEXT: v_cmp_class_f32_e64 s3, s0, 0x260
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s2, s5, s2
|
|
; GFX12-GISEL-NEXT: s_cmp_lg_u32 s1, 0
|
|
; GFX12-GISEL-NEXT: s_mul_f32 s4, s2, 0x37800000
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s1, s4, s2
|
|
; GFX12-GISEL-NEXT: s_cmp_lg_u32 s3, 0
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s0, s0, s1
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-GISEL-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: v_s_sqrt_f32:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v0, 0xf800000
|
|
; GCN-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v0, 0x4f800000
|
|
; GCN-GISEL-NEXT: v_mul_f32_e32 v0, s0, v0
|
|
; GCN-GISEL-NEXT: s_cmp_lg_u64 vcc, 0
|
|
; GCN-GISEL-NEXT: v_readfirstlane_b32 s2, v0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s0, s2, s0
|
|
; GCN-GISEL-NEXT: v_sqrt_f32_e32 v0, s0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s1, 1, 0
|
|
; GCN-GISEL-NEXT: v_readfirstlane_b32 s2, v0
|
|
; GCN-GISEL-NEXT: s_add_i32 s3, s2, -1
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v1, s3
|
|
; GCN-GISEL-NEXT: s_add_i32 s4, s2, 1
|
|
; GCN-GISEL-NEXT: v_fma_f32 v1, -v1, v0, s0
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v2, s4
|
|
; GCN-GISEL-NEXT: v_fma_f32 v0, -v2, v0, s0
|
|
; GCN-GISEL-NEXT: v_cmp_ge_f32_e32 vcc, 0, v1
|
|
; GCN-GISEL-NEXT: s_cmp_lg_u64 vcc, 0
|
|
; GCN-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, 0, v0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s2, s3, s2
|
|
; GCN-GISEL-NEXT: s_cmp_lg_u64 vcc, 0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s2, s4, s2
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v0, 0x37800000
|
|
; GCN-GISEL-NEXT: v_mul_f32_e32 v0, s2, v0
|
|
; GCN-GISEL-NEXT: v_readfirstlane_b32 s3, v0
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v0, 0x260
|
|
; GCN-GISEL-NEXT: s_cmp_lg_u32 s1, 0
|
|
; GCN-GISEL-NEXT: v_cmp_class_f32_e32 vcc, s0, v0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s1, s3, s2
|
|
; GCN-GISEL-NEXT: s_cmp_lg_u64 vcc, 0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s0, s0, s1
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v0, s0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%result = call float @llvm.sqrt.f32(float %src)
|
|
ret float %result
|
|
}
|
|
|
|
define amdgpu_cs half @v_s_sqrt_f16(half inreg %src) {
|
|
; GFX12-LABEL: v_s_sqrt_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: v_s_sqrt_f16 s0, s0
|
|
; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
|
|
; GFX12-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: v_s_sqrt_f16:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_sqrt_f16_e32 v0, s0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%result = call half @llvm.sqrt.f16(half %src)
|
|
ret half %result
|
|
}
|
|
|
|
define amdgpu_cs float @v_amdgcn_sqrt_f32(float inreg %src) {
|
|
; GFX12-LABEL: v_amdgcn_sqrt_f32:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: v_s_sqrt_f32 s0, s0
|
|
; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
|
|
; GFX12-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: v_amdgcn_sqrt_f32:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_sqrt_f32_e32 v0, s0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%result = call float @llvm.amdgcn.sqrt.f32(float %src)
|
|
ret float %result
|
|
}
|
|
|
|
define amdgpu_cs half @v_amdgcn_sqrt_f16(half inreg %src) {
|
|
; GFX12-LABEL: v_amdgcn_sqrt_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: v_s_sqrt_f16 s0, s0
|
|
; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
|
|
; GFX12-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: v_amdgcn_sqrt_f16:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_sqrt_f16_e32 v0, s0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%result = call half @llvm.amdgcn.sqrt.f16(half %src)
|
|
ret half %result
|
|
}
|
|
|
|
define amdgpu_cs float @srcmods_abs_f32(float inreg %src) {
|
|
; GFX12-SDAG-LABEL: srcmods_abs_f32:
|
|
; GFX12-SDAG: ; %bb.0:
|
|
; GFX12-SDAG-NEXT: s_bitset0_b32 s0, 31
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
|
|
; GFX12-SDAG-NEXT: s_cmp_lt_f32 s0, 0x800000
|
|
; GFX12-SDAG-NEXT: s_cselect_b32 s1, 0x4f800000, 1.0
|
|
; GFX12-SDAG-NEXT: s_mul_f32 s0, s0, s1
|
|
; GFX12-SDAG-NEXT: s_cselect_b32 s1, 0x42000000, 0
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2) | instskip(NEXT) | instid1(TRANS32_DEP_1)
|
|
; GFX12-SDAG-NEXT: v_s_log_f32 s0, s0
|
|
; GFX12-SDAG-NEXT: s_sub_f32 s0, s0, s1
|
|
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
|
|
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-SDAG-NEXT: ; return to shader part epilog
|
|
;
|
|
; GFX12-GISEL-LABEL: srcmods_abs_f32:
|
|
; GFX12-GISEL: ; %bb.0:
|
|
; GFX12-GISEL-NEXT: s_and_b32 s1, s0, 0x7fffffff
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
|
; GFX12-GISEL-NEXT: s_cmp_lt_f32 s1, 0x800000
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s2, 1, 0
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s1, 1, 0
|
|
; GFX12-GISEL-NEXT: s_lshl_b32 s2, s2, 5
|
|
; GFX12-GISEL-NEXT: s_cmp_lg_u32 s1, 0
|
|
; GFX12-GISEL-NEXT: v_ldexp_f32 v0, |s0|, s2
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s1, 0x42000000, 0
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
|
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v0
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-GISEL-NEXT: v_s_log_f32 s0, s0
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
|
|
; GFX12-GISEL-NEXT: s_sub_f32 s0, s0, s1
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-GISEL-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: srcmods_abs_f32:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
|
|
; GCN-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |s0|, v0
|
|
; GCN-GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s2, 1, 0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s1, 1, 0
|
|
; GCN-GISEL-NEXT: s_lshl_b32 s2, s2, 5
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v0, s2
|
|
; GCN-GISEL-NEXT: v_ldexp_f32 v0, |s0|, v0
|
|
; GCN-GISEL-NEXT: v_log_f32_e32 v0, v0
|
|
; GCN-GISEL-NEXT: s_cmp_lg_u32 s1, 0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s0, 0x42000000, 0
|
|
; GCN-GISEL-NEXT: v_subrev_f32_e32 v0, s0, v0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%abs = call float @llvm.fabs.f32(float %src)
|
|
%result = call float @llvm.log2.f32(float %abs)
|
|
ret float %result
|
|
}
|
|
|
|
define amdgpu_cs float @srcmods_neg_f32(float inreg %src) {
|
|
; GFX12-SDAG-LABEL: srcmods_neg_f32:
|
|
; GFX12-SDAG: ; %bb.0:
|
|
; GFX12-SDAG-NEXT: s_xor_b32 s1, s0, 0x80000000
|
|
; GFX12-SDAG-NEXT: s_cmp_gt_f32 s0, 0x80800000
|
|
; GFX12-SDAG-NEXT: s_cselect_b32 s0, 0x4f800000, 1.0
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
|
|
; GFX12-SDAG-NEXT: s_mul_f32 s0, s1, s0
|
|
; GFX12-SDAG-NEXT: s_cselect_b32 s1, 0x42000000, 0
|
|
; GFX12-SDAG-NEXT: v_s_log_f32 s0, s0
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
|
|
; GFX12-SDAG-NEXT: s_sub_f32 s0, s0, s1
|
|
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-SDAG-NEXT: ; return to shader part epilog
|
|
;
|
|
; GFX12-GISEL-LABEL: srcmods_neg_f32:
|
|
; GFX12-GISEL: ; %bb.0:
|
|
; GFX12-GISEL-NEXT: s_xor_b32 s1, s0, 0x80000000
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
|
; GFX12-GISEL-NEXT: s_cmp_lt_f32 s1, 0x800000
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s2, 1, 0
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s1, 1, 0
|
|
; GFX12-GISEL-NEXT: s_lshl_b32 s2, s2, 5
|
|
; GFX12-GISEL-NEXT: s_cmp_lg_u32 s1, 0
|
|
; GFX12-GISEL-NEXT: v_ldexp_f32 v0, -s0, s2
|
|
; GFX12-GISEL-NEXT: s_cselect_b32 s1, 0x42000000, 0
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
|
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v0
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-GISEL-NEXT: v_s_log_f32 s0, s0
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
|
|
; GFX12-GISEL-NEXT: s_sub_f32 s0, s0, s1
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-GISEL-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: srcmods_neg_f32:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
|
|
; GCN-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], -s0, v0
|
|
; GCN-GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s2, 1, 0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s1, 1, 0
|
|
; GCN-GISEL-NEXT: s_lshl_b32 s2, s2, 5
|
|
; GCN-GISEL-NEXT: v_mov_b32_e32 v0, s2
|
|
; GCN-GISEL-NEXT: v_ldexp_f32 v0, -s0, v0
|
|
; GCN-GISEL-NEXT: v_log_f32_e32 v0, v0
|
|
; GCN-GISEL-NEXT: s_cmp_lg_u32 s1, 0
|
|
; GCN-GISEL-NEXT: s_cselect_b32 s0, 0x42000000, 0
|
|
; GCN-GISEL-NEXT: v_subrev_f32_e32 v0, s0, v0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%neg = fneg float %src
|
|
%result = call float @llvm.log2.f32(float %neg)
|
|
ret float %result
|
|
}
|
|
|
|
define amdgpu_cs half @srcmods_abs_f16(half inreg %src) {
|
|
; GFX12-SDAG-LABEL: srcmods_abs_f16:
|
|
; GFX12-SDAG: ; %bb.0:
|
|
; GFX12-SDAG-NEXT: v_s_log_f16 s0, |s0|
|
|
; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
|
|
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-SDAG-NEXT: ; return to shader part epilog
|
|
;
|
|
; GFX12-GISEL-LABEL: srcmods_abs_f16:
|
|
; GFX12-GISEL: ; %bb.0:
|
|
; GFX12-GISEL-NEXT: v_log_f16_e64 v0.l, |s0|
|
|
; GFX12-GISEL-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: srcmods_abs_f16:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_log_f16_e64 v0, |s0|
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%abs = call half @llvm.fabs.f16(half %src)
|
|
%result = call half @llvm.log2.f16(half %abs)
|
|
ret half %result
|
|
}
|
|
|
|
define amdgpu_cs half @srcmods_neg_f16(half inreg %src) {
|
|
; GFX12-SDAG-LABEL: srcmods_neg_f16:
|
|
; GFX12-SDAG: ; %bb.0:
|
|
; GFX12-SDAG-NEXT: v_s_log_f16 s0, -s0
|
|
; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
|
|
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-SDAG-NEXT: ; return to shader part epilog
|
|
;
|
|
; GFX12-GISEL-LABEL: srcmods_neg_f16:
|
|
; GFX12-GISEL: ; %bb.0:
|
|
; GFX12-GISEL-NEXT: v_log_f16_e64 v0.l, -s0
|
|
; GFX12-GISEL-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: srcmods_neg_f16:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_log_f16_e64 v0, -s0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%neg = fneg half %src
|
|
%result = call half @llvm.log2.f16(half %neg)
|
|
ret half %result
|
|
}
|
|
|
|
define amdgpu_cs float @fdiv_f32_i32(float inreg %a, i32 inreg %b) {
|
|
; GFX12-LABEL: fdiv_f32_i32:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: s_cvt_f32_u32 s1, s1
|
|
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(TRANS32_DEP_1)
|
|
; GFX12-NEXT: v_s_rcp_f32 s1, s1
|
|
; GFX12-NEXT: s_mul_f32 s0, s0, s1
|
|
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
|
|
; GFX12-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: fdiv_f32_i32:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_cvt_f32_u32_e32 v0, s1
|
|
; GCN-GISEL-NEXT: v_rcp_f32_e32 v0, v0
|
|
; GCN-GISEL-NEXT: v_mul_f32_e32 v0, s0, v0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%uint = uitofp i32 %b to float
|
|
%result = fdiv afn float %a, %uint
|
|
ret float %result
|
|
}
|
|
|
|
define amdgpu_cs half @fdiv_f16_i16(half inreg %a, i16 inreg %b) {
|
|
; GFX12-SDAG-LABEL: fdiv_f16_i16:
|
|
; GFX12-SDAG: ; %bb.0:
|
|
; GFX12-SDAG-NEXT: v_cvt_f16_u16_e32 v0.l, s1
|
|
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
|
|
; GFX12-SDAG-NEXT: v_rcp_f16_e32 v0.l, v0.l
|
|
; GFX12-SDAG-NEXT: v_mul_f16_e32 v0.l, s0, v0.l
|
|
; GFX12-SDAG-NEXT: ; return to shader part epilog
|
|
;
|
|
; GFX12-GISEL-LABEL: fdiv_f16_i16:
|
|
; GFX12-GISEL: ; %bb.0:
|
|
; GFX12-GISEL-NEXT: v_cvt_f16_u16_e32 v0.l, s1
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
|
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v0
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
|
|
; GFX12-GISEL-NEXT: v_s_rcp_f16 s1, s1
|
|
; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
|
|
; GFX12-GISEL-NEXT: s_mul_f16 s0, s0, s1
|
|
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
|
|
; GFX12-GISEL-NEXT: ; return to shader part epilog
|
|
;
|
|
; GCN-GISEL-LABEL: fdiv_f16_i16:
|
|
; GCN-GISEL: ; %bb.0:
|
|
; GCN-GISEL-NEXT: v_cvt_f16_u16_e32 v0, s1
|
|
; GCN-GISEL-NEXT: v_rcp_f16_e32 v0, v0
|
|
; GCN-GISEL-NEXT: v_mul_f16_e32 v0, s0, v0
|
|
; GCN-GISEL-NEXT: ; return to shader part epilog
|
|
%uint = uitofp i16 %b to half
|
|
%result = fdiv afn half %a, %uint
|
|
ret half %result
|
|
}
|