derek.holloway
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122 lines
4.1 KiB
YAML
122 lines
4.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1170 -run-pass=si-fold-operands -verify-machineinstrs -o - %s | FileCheck --check-prefixes=GCN %s
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# RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -run-pass=si-fold-operands -verify-machineinstrs -o - %s | FileCheck --check-prefixes=GCN %s
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# Do not use inline constants for f16 pseudo scalar transcendentals.
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# But allow literal constants.
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---
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name: exp_f16_imm
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: exp_f16_imm
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 15360
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; GCN-NEXT: [[V_S_EXP_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_EXP_F16_e64 1, [[S_MOV_B32_]], 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 15360
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%1:sgpr_32 = V_S_EXP_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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---
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name: exp_f16_literal
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: exp_f16_literal
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; GCN: [[V_S_EXP_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_EXP_F16_e64 1, 16960, 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 16960
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%1:sgpr_32 = V_S_EXP_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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---
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name: log_f16_imm
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: log_f16_imm
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 15360
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; GCN-NEXT: [[V_S_LOG_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_LOG_F16_e64 1, [[S_MOV_B32_]], 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 15360
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%1:sgpr_32 = V_S_LOG_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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---
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name: log_f16_literal
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: log_f16_literal
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; GCN: [[V_S_LOG_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_LOG_F16_e64 1, 16960, 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 16960
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%1:sgpr_32 = V_S_LOG_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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---
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name: rcp_f16_imm
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: rcp_f16_imm
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 15360
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; GCN-NEXT: [[V_S_RCP_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_RCP_F16_e64 1, [[S_MOV_B32_]], 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 15360
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%1:sgpr_32 = V_S_RCP_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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---
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name: rcp_f16_literal
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: rcp_f16_literal
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; GCN: [[V_S_RCP_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_RCP_F16_e64 1, 16960, 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 16960
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%1:sgpr_32 = V_S_RCP_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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---
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name: rsq_f16_imm
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: rsq_f16_imm
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 15360
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; GCN-NEXT: [[V_S_RSQ_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_RSQ_F16_e64 1, [[S_MOV_B32_]], 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 15360
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%1:sgpr_32 = V_S_RSQ_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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---
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name: rsq_f16_literal
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: rsq_f16_literal
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; GCN: [[V_S_RSQ_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_RSQ_F16_e64 1, 16960, 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 16960
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%1:sgpr_32 = V_S_RSQ_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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---
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name: sqrt_f16_imm
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: sqrt_f16_imm
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 15360
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; GCN-NEXT: [[V_S_SQRT_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_SQRT_F16_e64 1, [[S_MOV_B32_]], 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 15360
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%1:sgpr_32 = V_S_SQRT_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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---
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name: sqrt_f16_literal
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: sqrt_f16_literal
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; GCN: [[V_S_SQRT_F16_e64_:%[0-9]+]]:sgpr_32 = V_S_SQRT_F16_e64 1, 16960, 0, 0, implicit $mode, implicit $exec
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%0:sgpr_32 = S_MOV_B32 16960
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%1:sgpr_32 = V_S_SQRT_F16_e64 1, %0:sgpr_32, 0, 0, implicit $mode, implicit $exec
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...
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