derek.holloway
7502bf64a4
CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
88 lines
2.9 KiB
YAML
88 lines
2.9 KiB
YAML
# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass register-coalescer,rename-independent-subregs -o - %s | FileCheck %s
|
|
--- |
|
|
define amdgpu_kernel void @test0() { ret void }
|
|
define amdgpu_kernel void @test1() { ret void }
|
|
define amdgpu_kernel void @test2() { ret void }
|
|
...
|
|
---
|
|
# In the test below we have two independent def+use pairs of subregister1 which
|
|
# can be moved to a new virtual register. The third def of sub1 however is used
|
|
# in combination with sub0 and needs to stay with the original vreg.
|
|
# CHECK-LABEL: name: test0
|
|
# CHECK: S_NOP 0, implicit-def undef %0.sub0
|
|
# CHECK: S_NOP 0, implicit-def undef %2.sub1
|
|
# CHECK: S_NOP 0, implicit %2.sub1
|
|
# CHECK: S_NOP 0, implicit-def undef %1.sub1
|
|
# CHECK: S_NOP 0, implicit %1.sub1
|
|
# CHECK: S_NOP 0, implicit-def %0.sub1
|
|
# CHECK: S_NOP 0, implicit %0
|
|
name: test0
|
|
registers:
|
|
- { id: 0, class: sgpr_128 }
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0, implicit-def undef %0.sub0
|
|
S_NOP 0, implicit-def %0.sub1
|
|
S_NOP 0, implicit %0.sub1
|
|
S_NOP 0, implicit-def %0.sub1
|
|
S_NOP 0, implicit %0.sub1
|
|
S_NOP 0, implicit-def %0.sub1
|
|
S_NOP 0, implicit %0
|
|
...
|
|
---
|
|
# Test for a bug where we would incorrectly query liveness at the instruction
|
|
# index in rewriteOperands(). This should pass the verifier afterwards.
|
|
# CHECK-LABEL: test1
|
|
# CHECK: bb.0
|
|
# CHECK: S_NOP 0, implicit-def undef %2.sub2
|
|
# CHECK: bb.1
|
|
# CHECK: S_NOP 0, implicit-def %2.sub1
|
|
# CHECK-NEXT: S_NOP 0, implicit-def %2.sub3
|
|
# CHECK-NEXT: S_NOP 0, implicit %2
|
|
# CHECK-NEXT: S_NOP 0, implicit-def undef %0.sub0
|
|
# CHECK-NEXT: S_NOP 0, implicit %2.sub1
|
|
# CHECK-NEXT: S_NOP 0, implicit %0.sub0
|
|
# CHECK: bb.2
|
|
# CHECK: S_NOP 0, implicit %2.sub
|
|
name: test1
|
|
registers:
|
|
- { id: 0, class: sgpr_128 }
|
|
- { id: 1, class: sgpr_128 }
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0, implicit-def undef %0.sub2
|
|
S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
|
|
S_BRANCH %bb.2
|
|
|
|
bb.1:
|
|
S_NOP 0, implicit-def %0.sub1
|
|
S_NOP 0, implicit-def %0.sub3
|
|
%1 = COPY %0
|
|
S_NOP 0, implicit %1
|
|
|
|
S_NOP 0, implicit-def %1.sub0
|
|
S_NOP 0, implicit %1.sub1
|
|
S_NOP 0, implicit %1.sub0
|
|
|
|
bb.2:
|
|
S_NOP 0, implicit %0.sub2
|
|
|
|
...
|
|
# In this test, there are two pairs of tied operands
|
|
# within the inline asm statement:
|
|
# (1) %0.sub0 + %0.sub0 and (2) %0.sub1 + %0.sub1
|
|
# Check that renaming (2) does not inadvertently rename (1).
|
|
# CHECK-LABEL: name: test2
|
|
# CHECK: INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def undef %0.sub0, regdef:VGPR_32, def dead %1.sub1, reguse tiedto:$0, undef %0.sub0(tied-def 3), reguse tiedto:$1, %1.sub1(tied-def 5)
|
|
name: test2
|
|
body: |
|
|
bb.0:
|
|
undef %0.sub0:vreg_64 = IMPLICIT_DEF
|
|
|
|
bb.1:
|
|
undef %0.sub1:vreg_64 = V_ALIGNBIT_B32_e64 %0.sub0:vreg_64, %0.sub0:vreg_64, 16, implicit $exec
|
|
INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def undef %0.sub0:vreg_64, regdef:VGPR_32, def %0.sub1:vreg_64, reguse tiedto:$0, undef %0.sub0:vreg_64(tied-def 3), reguse tiedto:$1, %0.sub1:vreg_64(tied-def 5)
|
|
S_BRANCH %bb.1
|
|
|
|
...
|