derek.holloway
7502bf64a4
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74 lines
2.8 KiB
LLVM
74 lines
2.8 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn < %s | FileCheck -check-prefixes=GCN,SI %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GCN,VI %s
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; GCN-LABEL: {{^}}no_reorder_v2f64_global_load_store:
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; GCN: buffer_load_dwordx4
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; GCN: buffer_load_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN: s_endpgm
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define amdgpu_kernel void @no_reorder_v2f64_global_load_store(ptr addrspace(1) nocapture %x, ptr addrspace(1) nocapture %y) nounwind {
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%tmp1 = load <2 x double>, ptr addrspace(1) %x, align 16
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%tmp4 = load <2 x double>, ptr addrspace(1) %y, align 16
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store <2 x double> %tmp4, ptr addrspace(1) %x, align 16
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store <2 x double> %tmp1, ptr addrspace(1) %y, align 16
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ret void
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}
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; GCN-LABEL: {{^}}no_reorder_scalarized_v2f64_local_load_store:
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; SI: ds_read2_b64
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; SI: ds_write2_b64
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; VI: ds_read_b128
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; VI: ds_write_b128
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; GCN: s_endpgm
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define amdgpu_kernel void @no_reorder_scalarized_v2f64_local_load_store(ptr addrspace(3) nocapture %x, ptr addrspace(3) nocapture %y) nounwind {
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%tmp1 = load <2 x double>, ptr addrspace(3) %x, align 16
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%tmp4 = load <2 x double>, ptr addrspace(3) %y, align 16
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store <2 x double> %tmp4, ptr addrspace(3) %x, align 16
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store <2 x double> %tmp1, ptr addrspace(3) %y, align 16
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ret void
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}
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; GCN-LABEL: {{^}}no_reorder_split_v8i32_global_load_store:
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; GCN: buffer_load_dwordx4
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; GCN: buffer_load_dwordx4
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; GCN: buffer_load_dwordx4
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; GCN: buffer_load_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN: s_endpgm
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define amdgpu_kernel void @no_reorder_split_v8i32_global_load_store(ptr addrspace(1) nocapture %x, ptr addrspace(1) nocapture %y) nounwind {
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%tmp1 = load <8 x i32>, ptr addrspace(1) %x, align 32
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%tmp4 = load <8 x i32>, ptr addrspace(1) %y, align 32
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store <8 x i32> %tmp4, ptr addrspace(1) %x, align 32
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store <8 x i32> %tmp1, ptr addrspace(1) %y, align 32
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ret void
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}
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; GCN-LABEL: {{^}}no_reorder_extload_64:
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; GCN: ds_read_b64
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; GCN: ds_read_b64
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; GCN: ds_write_b64
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; GCN-NOT: ds_read
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; GCN: ds_write_b64
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; GCN: s_endpgm
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define amdgpu_kernel void @no_reorder_extload_64(ptr addrspace(3) nocapture %x, ptr addrspace(3) nocapture %y) nounwind {
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%tmp1 = load <2 x i32>, ptr addrspace(3) %x, align 8
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%tmp4 = load <2 x i32>, ptr addrspace(3) %y, align 8
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%tmp1ext = zext <2 x i32> %tmp1 to <2 x i64>
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%tmp4ext = zext <2 x i32> %tmp4 to <2 x i64>
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%tmp7 = add <2 x i64> %tmp1ext, <i64 1, i64 1>
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%tmp9 = add <2 x i64> %tmp4ext, <i64 1, i64 1>
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%trunctmp9 = trunc <2 x i64> %tmp9 to <2 x i32>
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%trunctmp7 = trunc <2 x i64> %tmp7 to <2 x i32>
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store <2 x i32> %trunctmp9, ptr addrspace(3) %x, align 8
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store <2 x i32> %trunctmp7, ptr addrspace(3) %y, align 8
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ret void
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}
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