derek.holloway
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35 lines
1.7 KiB
LLVM
35 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -O0 < %s -debug-only=isel 2>&1 | FileCheck --check-prefixes=GCN,GCN-DEFAULT %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -O0 < %s -debug-only=isel -dag-dump-verbose 2>&1 | FileCheck --check-prefixes=GCN,GCN-VERBOSE %s
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; REQUIRES: asserts
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; GCN-LABEL: === test_sdag_dump
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; GCN: Initial selection DAG: %bb.0 'test_sdag_dump:entry'
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; GCN: SelectionDAG has 11 nodes:
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; GCN-DEFAULT: t0: ch,glue = EntryToken
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; GCN-DEFAULT: t2: f32,ch = CopyFromReg t0, Register:f32 %0
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; GCN-DEFAULT: t7: i32 = TargetConstant<
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; GCN-DEFAULT: t5: f32 = fadd t2, t2
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; GCN-DEFAULT: t4: f32,ch = CopyFromReg # D:1 t0, Register:f32 %1
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; GCN-DEFAULT: t6: f32 = fadd # D:1 t5, t4
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; GCN-DEFAULT: t9: ch,glue = CopyToReg # D:1 t0, Register:f32 $vgpr0, t6
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; GCN-DEFAULT: t10: ch = AMDGPUISD::RETURN_TO_EPILOG t9, Register:f32 $vgpr0, t9:1
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; GCN-VERBOSE: t0: ch,glue = EntryToken # D:0
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; GCN-VERBOSE: t2: f32,ch = CopyFromReg [ORD=1] # D:0 t0, Register:f32 %0 # D:0
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; GCN-VERBOSE: t7: i32 = TargetConstant<
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; GCN-VERBOSE: t5: f32 = fadd [ORD=2] # D:0 t2, t2
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; GCN-VERBOSE: t4: f32,ch = CopyFromReg [ORD=1] # D:1 t0, Register:f32 %1 # D:0
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; GCN-VERBOSE: t6: f32 = fadd [ORD=3] # D:1 t5, t4
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; GCN-VERBOSE: t9: ch,glue = CopyToReg [ORD=4] # D:1 t0, Register:f32 $vgpr0 # D:0, t6
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; GCN-VERBOSE: t10: ch = AMDGPUISD::RETURN_TO_EPILOG [ORD=4] # D:0 t9, Register:f32 $vgpr0 # D:0, t9:1
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define amdgpu_ps float @test_sdag_dump(float inreg %scalar, float %vector) {
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entry:
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%sadd = fadd float %scalar, %scalar
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%ret = fadd float %sadd, %vector
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ret float %ret
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}
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