derek.holloway
7502bf64a4
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24 lines
887 B
LLVM
24 lines
887 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=VI %s
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; FIXME: This one should fold to rcp
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define half @select_fneg_posk_src_rcp_f16(i32 %c, half %x, half %y) {
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; VI-LABEL: select_fneg_posk_src_rcp_f16:
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; VI: ; %bb.0:
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; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; VI-NEXT: v_rcp_f16_e64 v1, -v1
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; VI-NEXT: v_mov_b32_e32 v2, 0x4000
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; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
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; VI-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc
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; VI-NEXT: s_setpc_b64 s[30:31]
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%cmp = icmp eq i32 %c, 0
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%rcp = call half @llvm.amdgcn.rcp.f16(half %x)
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%fneg = fneg half %rcp
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%select = select i1 %cmp, half %fneg, half 2.0
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ret half %select
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}
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declare half @llvm.amdgcn.rcp.f16(half) #0
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attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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