derek.holloway
7502bf64a4
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26 lines
1.2 KiB
LLVM
26 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 --misched=si -mattr=si-scheduler < %s | FileCheck %s
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define amdgpu_gs void @_amdgpu_gs_main() {
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; CHECK-LABEL: _amdgpu_gs_main:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: v_mov_b32_e32 v0, 0
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; CHECK-NEXT: s_mov_b32 s0, 0
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; CHECK-NEXT: s_mov_b32 s1, s0
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; CHECK-NEXT: s_mov_b32 s2, s0
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; CHECK-NEXT: v_mov_b32_e32 v1, v0
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; CHECK-NEXT: v_mov_b32_e32 v2, v0
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; CHECK-NEXT: v_mov_b32_e32 v3, v0
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; CHECK-NEXT: s_mov_b32 s3, s0
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; CHECK-NEXT: exp mrt0, off, off, off, off
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; CHECK-NEXT: buffer_store_dwordx4 v[0:3], v0, s[0:3], 0 idxen
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; CHECK-NEXT: s_endpgm
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entry:
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call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i1 false, i1 false)
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call void @llvm.amdgcn.struct.ptr.buffer.store.v4f32(<4 x float> zeroinitializer, ptr addrspace(8) zeroinitializer, i32 0, i32 0, i32 0, i32 0)
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ret void
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}
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declare void @llvm.amdgcn.exp.f32(i32 immarg, i32 immarg, float, float, float, float, i1 immarg, i1 immarg)
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declare void @llvm.amdgcn.struct.ptr.buffer.store.v4f32(<4 x float>, ptr addrspace(8), i32, i32, i32, i32 immarg)
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