derek.holloway
7502bf64a4
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25 lines
849 B
LLVM
25 lines
849 B
LLVM
; REQUIRES: asserts
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; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -debug-only=branch-relaxation < %s 2>&1 | FileCheck --check-prefix=GFX10 %s
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; GFX10: Basic blocks after relaxation
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; GFX10: %bb.0 offset=00000000 size=0x28
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; At -O0 without DAG combines, more instructions are generated.
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define amdgpu_kernel void @test_sopk_size(i32 %var.mode) {
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; GFX10-LABEL: test_sopk_size:
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; GFX10: ; %bb.0:
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; GFX10: s_load_b32 s0, s[4:5], 0x0
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; GFX10: s_mov_b32 s1, 3
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; GFX10: s_setreg_b32 hwreg(HW_REG_MODE, 0, 2), s1
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; GFX10: s_waitcnt lgkmcnt(0)
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; GFX10: s_setreg_b32 hwreg(HW_REG_MODE, 0, 3), s0
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; GFX10: s_endpgm
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call void @llvm.amdgcn.s.setreg(i32 2049, i32 3)
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call void @llvm.amdgcn.s.setreg(i32 4097, i32 %var.mode)
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call void asm sideeffect "", ""()
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ret void
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}
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declare void @llvm.amdgcn.s.setreg(i32 immarg, i32)
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