derek.holloway
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164 lines
9.0 KiB
YAML
164 lines
9.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -run-pass=prologepilog,machine-cp -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
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# The COPY that moves the return value to VGPR0 should not be removed during machine-cp. The spill restore of the same register that follows,
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# meant to only reload its inactive lanes. By marking the reg itself as the tied-op in the spill reload prevents the undesired optimization.
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---
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name: wwm_scratch_reg_spill_reload_of_outgoing_reg
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tracksRegLiveness: true
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machineFunctionInfo:
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wwmReservedRegs: ['$vgpr0']
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isEntryFunction: false
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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stackPtrOffsetReg: '$sgpr32'
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frameOffsetReg: '$sgpr33'
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body: |
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bb.0:
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liveins: $sgpr20, $vgpr1
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; GCN-LABEL: name: wwm_scratch_reg_spill_reload_of_outgoing_reg
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; GCN: liveins: $sgpr20, $vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
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; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
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; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
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; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
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; GCN-NEXT: $vgpr0 = IMPLICIT_DEF
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; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr0
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; GCN-NEXT: $vgpr0 = COPY killed renamable $vgpr1, implicit $exec
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; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; GCN-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $vgpr0(tied-def 0) :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
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; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
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; GCN-NEXT: SI_RETURN implicit $vgpr0
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$vgpr0 = IMPLICIT_DEF
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$vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr0
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$vgpr0 = COPY killed renamable $vgpr1, implicit $exec
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SI_RETURN implicit $vgpr0
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...
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# The reload of vgpr0 require the tied-op as it is a subreg in the outgoing tuple register vgpr0_vgpr1.
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# The vgpr2 doesn't need the tied-op in the reload as it isn't holding any return value.
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---
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name: wwm_scratch_reg_spill_reload_of_outgoing_tuple_subreg
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tracksRegLiveness: true
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machineFunctionInfo:
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wwmReservedRegs: ['$vgpr0', '$vgpr2']
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isEntryFunction: false
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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stackPtrOffsetReg: '$sgpr32'
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frameOffsetReg: '$sgpr33'
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body: |
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bb.0:
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liveins: $sgpr20, $sgpr21, $vgpr1
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; GCN-LABEL: name: wwm_scratch_reg_spill_reload_of_outgoing_tuple_subreg
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; GCN: liveins: $sgpr20, $sgpr21, $vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
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; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
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; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
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; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
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; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: ("amdgpu-thread-private" store (s32) into %stack.1, addrspace 5)
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; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 256
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; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
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; GCN-NEXT: $vgpr0 = IMPLICIT_DEF
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; GCN-NEXT: $vgpr2 = IMPLICIT_DEF
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; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr0
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; GCN-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR killed $sgpr21, 0, $vgpr2
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; GCN-NEXT: $vgpr0 = COPY $vgpr1, implicit $exec
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; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; GCN-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $vgpr0(tied-def 0) :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
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; GCN-NEXT: $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: ("amdgpu-thread-private" load (s32) from %stack.1, addrspace 5)
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; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
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; GCN-NEXT: SI_RETURN implicit $vgpr0_vgpr1
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$vgpr0 = IMPLICIT_DEF
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$vgpr2 = IMPLICIT_DEF
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$vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr0
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$vgpr2 = SI_SPILL_S32_TO_VGPR killed $sgpr21, 0, $vgpr2
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$vgpr0 = COPY $vgpr1, implicit $exec
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SI_RETURN implicit $vgpr0_vgpr1
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...
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# Tied op not required in the spill reload of vgpr2.
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---
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name: wwm_scratch_reg_spill_reload_different_outgoing_reg
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tracksRegLiveness: true
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machineFunctionInfo:
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wwmReservedRegs: ['$vgpr2']
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isEntryFunction: false
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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stackPtrOffsetReg: '$sgpr32'
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frameOffsetReg: '$sgpr33'
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body: |
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bb.0:
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liveins: $sgpr20, $vgpr1
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; GCN-LABEL: name: wwm_scratch_reg_spill_reload_different_outgoing_reg
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; GCN: liveins: $sgpr20, $vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
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; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
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; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
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; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 0
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; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
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; GCN-NEXT: $vgpr2 = IMPLICIT_DEF
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; GCN-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr2
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; GCN-NEXT: $vgpr0 = COPY $vgpr1, implicit $exec
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; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; GCN-NEXT: $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
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; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
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; GCN-NEXT: SI_RETURN implicit $vgpr0_vgpr1
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$vgpr2 = IMPLICIT_DEF
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$vgpr2 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr2
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$vgpr0 = COPY $vgpr1, implicit $exec
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SI_RETURN implicit $vgpr0_vgpr1
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...
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# Tied op not required in the spill reload of vgpr40 which is in the CSR range.
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---
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name: wwm_csr_spill_reload
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tracksRegLiveness: true
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machineFunctionInfo:
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wwmReservedRegs: ['$vgpr40']
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isEntryFunction: false
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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stackPtrOffsetReg: '$sgpr32'
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frameOffsetReg: '$sgpr33'
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body: |
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bb.0:
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liveins: $sgpr20, $vgpr1
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; GCN-LABEL: name: wwm_csr_spill_reload
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; GCN: liveins: $sgpr20, $vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
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; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
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; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
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; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
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; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 0
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; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
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; GCN-NEXT: $vgpr2 = IMPLICIT_DEF
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; GCN-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr2
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; GCN-NEXT: $sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr2, 0, implicit $exec
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; GCN-NEXT: $vgpr0 = COPY killed $vgpr1, implicit $exec
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; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; GCN-NEXT: $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
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; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
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; GCN-NEXT: SI_RETURN implicit $vgpr0
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$vgpr40 = IMPLICIT_DEF
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$vgpr40 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr40
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$sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr40, 0, implicit $exec
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$vgpr0 = COPY killed $vgpr1, implicit $exec
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SI_RETURN implicit $vgpr0
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...
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