derek.holloway
7502bf64a4
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297 lines
12 KiB
LLVM
297 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=amdgcn-- -mcpu=tahiti | FileCheck %s --check-prefix=SI
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; RUN: llc < %s -mtriple=amdgcn-- -mcpu=fiji -mattr=-flat-for-global | FileCheck %s --check-prefix=VI
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; RUN: llc < %s -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+real-true16 -mattr=-flat-for-global | FileCheck %s --check-prefixes=GFX11,GFX11-TRUE16
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; RUN: llc < %s -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global | FileCheck %s --check-prefixes=GFX11,GFX11-FAKE16
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define amdgpu_kernel void @madak_f16(
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; SI-LABEL: madak_f16:
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; SI: ; %bb.0: ; %entry
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; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
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; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd
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; SI-NEXT: s_mov_b32 s7, 0xf000
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; SI-NEXT: s_mov_b32 s6, -1
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; SI-NEXT: s_mov_b32 s10, s6
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; SI-NEXT: s_mov_b32 s11, s7
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; SI-NEXT: s_waitcnt lgkmcnt(0)
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; SI-NEXT: s_mov_b32 s12, s2
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; SI-NEXT: s_mov_b32 s13, s3
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; SI-NEXT: s_mov_b32 s14, s6
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; SI-NEXT: s_mov_b32 s15, s7
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; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0
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; SI-NEXT: buffer_load_ushort v1, off, s[12:15], 0
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; SI-NEXT: s_mov_b32 s4, s0
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; SI-NEXT: s_mov_b32 s5, s1
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; SI-NEXT: s_waitcnt vmcnt(1)
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; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
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; SI-NEXT: v_mul_f32_e32 v0, v1, v0
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; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
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; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
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; SI-NEXT: v_add_f32_e32 v0, 0x41200000, v0
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; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
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; SI-NEXT: buffer_store_short v0, off, s[4:7], 0
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; SI-NEXT: s_endpgm
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;
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; VI-LABEL: madak_f16:
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; VI: ; %bb.0: ; %entry
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; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
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; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
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; VI-NEXT: s_mov_b32 s7, 0xf000
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; VI-NEXT: s_mov_b32 s6, -1
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; VI-NEXT: s_mov_b32 s14, s6
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; VI-NEXT: s_waitcnt lgkmcnt(0)
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; VI-NEXT: s_mov_b32 s12, s2
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; VI-NEXT: s_mov_b32 s13, s3
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; VI-NEXT: s_mov_b32 s15, s7
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; VI-NEXT: s_mov_b32 s10, s6
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; VI-NEXT: s_mov_b32 s11, s7
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; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0
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; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0
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; VI-NEXT: s_mov_b32 s4, s0
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; VI-NEXT: s_mov_b32 s5, s1
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; VI-NEXT: s_waitcnt vmcnt(0)
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; VI-NEXT: v_madak_f16 v0, v0, v1, 0x4900
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; VI-NEXT: buffer_store_short v0, off, s[4:7], 0
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; VI-NEXT: s_endpgm
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;
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; GFX11-TRUE16-LABEL: madak_f16:
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; GFX11-TRUE16: ; %bb.0: ; %entry
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; GFX11-TRUE16-NEXT: s_clause 0x1
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; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
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; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
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; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
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; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
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; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
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; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
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; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
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; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
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; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
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; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[12:15], 0
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; GFX11-TRUE16-NEXT: buffer_load_d16_hi_b16 v0, off, s[4:7], 0
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; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
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; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v0.h
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.l, 0x4900, v0.l
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; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0
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; GFX11-TRUE16-NEXT: s_endpgm
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;
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; GFX11-FAKE16-LABEL: madak_f16:
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; GFX11-FAKE16: ; %bb.0: ; %entry
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; GFX11-FAKE16-NEXT: s_clause 0x1
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; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
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; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
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; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
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; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
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; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
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; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
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; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
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; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
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; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
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; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0
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; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0
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; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
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; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1
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; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-FAKE16-NEXT: v_add_f16_e32 v0, 0x4900, v0
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; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0
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; GFX11-FAKE16-NEXT: s_endpgm
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ptr addrspace(1) %r,
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ptr addrspace(1) %a,
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ptr addrspace(1) %b) #0 {
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entry:
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%a.val = load half, ptr addrspace(1) %a
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%b.val = load half, ptr addrspace(1) %b
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%t.val = fmul half %a.val, %b.val
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%r.val = fadd half %t.val, 10.0
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store half %r.val, ptr addrspace(1) %r
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ret void
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}
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define amdgpu_kernel void @madak_f16_use_2(
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; SI-LABEL: madak_f16_use_2:
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; SI: ; %bb.0: ; %entry
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; SI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x9
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; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x11
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; SI-NEXT: s_mov_b32 s3, 0xf000
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; SI-NEXT: s_mov_b32 s2, -1
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; SI-NEXT: s_mov_b32 s18, s2
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; SI-NEXT: s_waitcnt lgkmcnt(0)
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; SI-NEXT: s_mov_b32 s16, s12
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; SI-NEXT: s_mov_b32 s17, s13
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; SI-NEXT: s_mov_b32 s19, s3
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; SI-NEXT: s_mov_b32 s12, s14
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; SI-NEXT: s_mov_b32 s13, s15
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; SI-NEXT: s_mov_b32 s14, s2
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; SI-NEXT: s_mov_b32 s15, s3
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; SI-NEXT: s_mov_b32 s6, s2
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; SI-NEXT: s_mov_b32 s7, s3
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; SI-NEXT: buffer_load_ushort v0, off, s[16:19], 0 glc
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: buffer_load_ushort v1, off, s[12:15], 0 glc
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: s_mov_b32 s0, s8
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; SI-NEXT: s_mov_b32 s1, s9
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; SI-NEXT: s_mov_b32 s4, s10
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; SI-NEXT: s_mov_b32 s5, s11
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; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
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; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
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; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
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; SI-NEXT: v_mul_f32_e32 v1, v0, v1
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; SI-NEXT: v_mul_f32_e32 v0, v0, v2
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; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
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; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
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; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
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; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
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; SI-NEXT: v_add_f32_e32 v1, 0x41200000, v1
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; SI-NEXT: v_add_f32_e32 v0, 0x41200000, v0
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; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
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; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
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; SI-NEXT: buffer_store_short v1, off, s[0:3], 0
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; SI-NEXT: buffer_store_short v0, off, s[4:7], 0
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; SI-NEXT: s_endpgm
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;
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; VI-LABEL: madak_f16_use_2:
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; VI: ; %bb.0: ; %entry
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; VI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24
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; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x44
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; VI-NEXT: s_mov_b32 s3, 0xf000
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; VI-NEXT: s_mov_b32 s2, -1
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; VI-NEXT: s_mov_b32 s18, s2
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; VI-NEXT: s_waitcnt lgkmcnt(0)
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; VI-NEXT: s_mov_b32 s16, s12
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; VI-NEXT: s_mov_b32 s17, s13
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; VI-NEXT: s_mov_b32 s19, s3
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; VI-NEXT: s_mov_b32 s12, s14
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; VI-NEXT: s_mov_b32 s13, s15
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; VI-NEXT: s_mov_b32 s14, s2
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; VI-NEXT: s_mov_b32 s15, s3
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; VI-NEXT: s_mov_b32 s6, s2
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; VI-NEXT: s_mov_b32 s7, s3
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; VI-NEXT: buffer_load_ushort v0, off, s[16:19], 0 glc
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; VI-NEXT: s_waitcnt vmcnt(0)
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; VI-NEXT: buffer_load_ushort v1, off, s[12:15], 0 glc
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; VI-NEXT: s_waitcnt vmcnt(0)
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; VI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc
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; VI-NEXT: s_waitcnt vmcnt(0)
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; VI-NEXT: v_mov_b32_e32 v3, 0x4900
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; VI-NEXT: s_mov_b32 s0, s8
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; VI-NEXT: s_mov_b32 s1, s9
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; VI-NEXT: s_mov_b32 s4, s10
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; VI-NEXT: s_mov_b32 s5, s11
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; VI-NEXT: v_madak_f16 v1, v0, v1, 0x4900
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; VI-NEXT: v_mac_f16_e32 v3, v0, v2
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; VI-NEXT: buffer_store_short v1, off, s[0:3], 0
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; VI-NEXT: buffer_store_short v3, off, s[4:7], 0
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; VI-NEXT: s_endpgm
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;
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; GFX11-TRUE16-LABEL: madak_f16_use_2:
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; GFX11-TRUE16: ; %bb.0: ; %entry
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; GFX11-TRUE16-NEXT: s_clause 0x1
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; GFX11-TRUE16-NEXT: s_load_b256 s[8:15], s[4:5], 0x24
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; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x44
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; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
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; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX11-TRUE16-NEXT: s_mov_b32 s18, s6
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; GFX11-TRUE16-NEXT: s_mov_b32 s19, s7
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; GFX11-TRUE16-NEXT: s_mov_b32 s22, s6
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; GFX11-TRUE16-NEXT: s_mov_b32 s23, s7
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; GFX11-TRUE16-NEXT: s_mov_b32 s2, s6
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; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7
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; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-TRUE16-NEXT: s_mov_b32 s16, s12
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; GFX11-TRUE16-NEXT: s_mov_b32 s17, s13
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; GFX11-TRUE16-NEXT: s_mov_b32 s20, s14
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; GFX11-TRUE16-NEXT: s_mov_b32 s21, s15
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; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[16:19], 0 glc dlc
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: buffer_load_d16_hi_b16 v0, off, s[20:23], 0 glc dlc
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v1, off, s[0:3], 0 glc dlc
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: s_mov_b32 s4, s8
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; GFX11-TRUE16-NEXT: s_mov_b32 s5, s9
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; GFX11-TRUE16-NEXT: s_mov_b32 s0, s10
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; GFX11-TRUE16-NEXT: s_mov_b32 s1, s11
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; GFX11-TRUE16-NEXT: v_mul_f16_e32 v0.h, v0.l, v0.h
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; GFX11-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
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; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.h, 0x4900, v0.h
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; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.l, 0x4900, v0.l
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; GFX11-TRUE16-NEXT: buffer_store_d16_hi_b16 v0, off, s[4:7], 0
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; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
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; GFX11-TRUE16-NEXT: s_endpgm
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;
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; GFX11-FAKE16-LABEL: madak_f16_use_2:
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; GFX11-FAKE16: ; %bb.0: ; %entry
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; GFX11-FAKE16-NEXT: s_clause 0x1
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; GFX11-FAKE16-NEXT: s_load_b256 s[8:15], s[4:5], 0x24
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; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x44
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; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1
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; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX11-FAKE16-NEXT: s_mov_b32 s18, s6
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; GFX11-FAKE16-NEXT: s_mov_b32 s19, s7
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; GFX11-FAKE16-NEXT: s_mov_b32 s22, s6
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; GFX11-FAKE16-NEXT: s_mov_b32 s23, s7
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; GFX11-FAKE16-NEXT: s_mov_b32 s2, s6
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; GFX11-FAKE16-NEXT: s_mov_b32 s3, s7
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; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-FAKE16-NEXT: s_mov_b32 s16, s12
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; GFX11-FAKE16-NEXT: s_mov_b32 s17, s13
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; GFX11-FAKE16-NEXT: s_mov_b32 s20, s14
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; GFX11-FAKE16-NEXT: s_mov_b32 s21, s15
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; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[16:19], 0 glc dlc
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[20:23], 0 glc dlc
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-FAKE16-NEXT: buffer_load_u16 v2, off, s[0:3], 0 glc dlc
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-FAKE16-NEXT: s_mov_b32 s4, s8
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; GFX11-FAKE16-NEXT: s_mov_b32 s5, s9
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; GFX11-FAKE16-NEXT: s_mov_b32 s0, s10
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; GFX11-FAKE16-NEXT: s_mov_b32 s1, s11
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; GFX11-FAKE16-NEXT: v_mul_f16_e32 v1, v0, v1
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; GFX11-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2
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|
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
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; GFX11-FAKE16-NEXT: v_add_f16_e32 v1, 0x4900, v1
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; GFX11-FAKE16-NEXT: v_add_f16_e32 v0, 0x4900, v0
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; GFX11-FAKE16-NEXT: buffer_store_b16 v1, off, s[4:7], 0
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; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
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|
; GFX11-FAKE16-NEXT: s_endpgm
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|
ptr addrspace(1) %r0,
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|
ptr addrspace(1) %r1,
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|
ptr addrspace(1) %a,
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|
ptr addrspace(1) %b,
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|
ptr addrspace(1) %c) #0 {
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|
entry:
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|
%a.val = load volatile half, ptr addrspace(1) %a
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|
%b.val = load volatile half, ptr addrspace(1) %b
|
|
%c.val = load volatile half, ptr addrspace(1) %c
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|
|
|
%t0.val = fmul half %a.val, %b.val
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|
%t1.val = fmul half %a.val, %c.val
|
|
%r0.val = fadd half %t0.val, 10.0
|
|
%r1.val = fadd half %t1.val, 10.0
|
|
|
|
store half %r0.val, ptr addrspace(1) %r0
|
|
store half %r1.val, ptr addrspace(1) %r1
|
|
ret void
|
|
}
|
|
|
|
attributes #0 = { denormal_fpenv(preservesign) }
|
|
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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|
; GFX11: {{.*}}
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