derek.holloway
7502bf64a4
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43 lines
2.1 KiB
LLVM
43 lines
2.1 KiB
LLVM
; RUN: llc -mtriple=armv7-eabi -mcpu=cortex-a8 < %s
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; PR5411
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%bar = type { %quad, float, float, [3 x ptr], [3 x ptr], [2 x ptr], [3 x i8], i8 }
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%baz = type { ptr, i32 }
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%foo = type { i8, %quuz, %quad, float, [64 x %quux], [128 x %bar], i32, %baz, %baz }
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%quad = type { [4 x float] }
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%quux = type { %quad, %quad }
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%quuz = type { [4 x ptr], [4 x float], i32 }
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define arm_aapcs_vfpcc ptr @aaa(ptr nocapture %this, ptr %a, ptr %b, ptr %c, i8 zeroext %forced) {
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entry:
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br i1 undef, label %bb85, label %bb
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bb: ; preds = %entry
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%0 = getelementptr inbounds %bar, ptr null, i32 0, i32 0, i32 0, i32 2 ; <ptr> [#uses=2]
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%1 = load float, ptr undef, align 4 ; <float> [#uses=1]
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%2 = fsub float 0.000000e+00, undef ; <float> [#uses=2]
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%3 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
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%4 = load float, ptr %0, align 4 ; <float> [#uses=3]
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%5 = fmul float %4, %2 ; <float> [#uses=1]
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%6 = fsub float %3, %5 ; <float> [#uses=1]
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%7 = fmul float %4, undef ; <float> [#uses=1]
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%8 = fsub float %7, undef ; <float> [#uses=1]
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%9 = fmul float undef, %2 ; <float> [#uses=1]
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%10 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
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%11 = fsub float %9, %10 ; <float> [#uses=1]
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%12 = fmul float undef, %6 ; <float> [#uses=1]
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%13 = fmul float 0.000000e+00, %8 ; <float> [#uses=1]
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%14 = fadd float %12, %13 ; <float> [#uses=1]
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%15 = fmul float %1, %11 ; <float> [#uses=1]
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%16 = fadd float %14, %15 ; <float> [#uses=1]
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%17 = select i1 undef, float undef, float %16 ; <float> [#uses=1]
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%18 = fdiv float %17, 0.000000e+00 ; <float> [#uses=1]
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store float %18, ptr undef, align 4
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%19 = fmul float %4, undef ; <float> [#uses=1]
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store float %19, ptr %0, align 4
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ret ptr null
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bb85: ; preds = %entry
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ret ptr null
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}
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