derek.holloway
7502bf64a4
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25 lines
935 B
LLVM
25 lines
935 B
LLVM
;PR14492 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIA
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;RUN: llc -mtriple=thumbv7 < %s | FileCheck -check-prefix=EXPECTED %s
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;RUN: llc -mtriple=thumbv7 < %s | FileCheck %s
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;EXPECTED-LABEL: foo:
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;CHECK-LABEL: foo:
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define i32 @foo(ptr %a) nounwind optsize {
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entry:
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%0 = load i32, ptr %a, align 4
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%arrayidx1 = getelementptr inbounds i32, ptr %a, i32 1
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%1 = load i32, ptr %arrayidx1, align 4
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%arrayidx2 = getelementptr inbounds i32, ptr %a, i32 2
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%2 = load i32, ptr %arrayidx2, align 4
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%add.ptr = getelementptr inbounds i32, ptr %a, i32 3
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;Make sure we do not have a duplicated register in the front of the reg list
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;EXPECTED: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], {{r[0-9]+}},
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;CHECK-NOT: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], [[REG]],
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tail call void @bar(ptr %add.ptr) nounwind optsize
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%add = add nsw i32 %1, %0
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%add3 = add nsw i32 %add, %2
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ret i32 %add3
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}
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declare void @bar(ptr) optsize
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