derek.holloway
7502bf64a4
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111 lines
4.4 KiB
LLVM
111 lines
4.4 KiB
LLVM
; RUN: llc < %s -mtriple=bpfel -verify-machineinstrs -bpf-expand-memcpy-in-order | FileCheck %s
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; RUN: llc < %s -mtriple=bpfeb -verify-machineinstrs -bpf-expand-memcpy-in-order | FileCheck %s
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;
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; #define COPY_LEN 9
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;
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; void cal_align1(ptr a, ptr b)
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; {
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; __builtin_memcpy(a, b, COPY_LEN);
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; }
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;
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; void cal_align2(short *a, short *b)
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; {
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; __builtin_memcpy(a, b, COPY_LEN);
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; }
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;
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; #undef COPY_LEN
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; #define COPY_LEN 19
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; void cal_align4(int *a, int *b)
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; {
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; __builtin_memcpy(a, b, COPY_LEN);
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; }
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;
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; #undef COPY_LEN
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; #define COPY_LEN 27
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; void cal_align8(long long *a, long long *b)
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; {
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; __builtin_memcpy(a, b, COPY_LEN);
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; }
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; Function Attrs: nounwind
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define dso_local void @cal_align1(ptr nocapture %a, ptr nocapture readonly %b) local_unnamed_addr #0 {
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entry:
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tail call void @llvm.memcpy.p0.p0.i64(ptr align 1 %a, ptr align 1 %b, i64 9, i1 false)
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ret void
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}
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; Function Attrs: argmemonly nounwind
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declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #1
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; CHECK: [[SCRATCH_REG:r[0-9]]] = *(u8 *)([[SRC_REG:r[0-9]]] + 0)
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; CHECK: *(u8 *)([[DST_REG:r[0-9]]] + 0) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 1)
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; CHECK: *(u8 *)([[DST_REG]] + 1) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 2)
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; CHECK: *(u8 *)([[DST_REG]] + 2) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 3)
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; CHECK: *(u8 *)([[DST_REG]] + 3) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 4)
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; CHECK: *(u8 *)([[DST_REG]] + 4) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 5)
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; CHECK: *(u8 *)([[DST_REG]] + 5) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 6)
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; CHECK: *(u8 *)([[DST_REG]] + 6) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 7)
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; CHECK: *(u8 *)([[DST_REG]] + 7) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 8)
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; CHECK: *(u8 *)([[DST_REG]] + 8) = [[SCRATCH_REG]]
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; Function Attrs: nounwind
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define dso_local void @cal_align2(ptr nocapture %a, ptr nocapture readonly %b) local_unnamed_addr #0 {
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entry:
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tail call void @llvm.memcpy.p0.p0.i64(ptr align 2 %a, ptr align 2 %b, i64 9, i1 false)
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ret void
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}
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; CHECK: [[SCRATCH_REG:r[0-9]]] = *(u16 *)([[SRC_REG:r[0-9]]] + 0)
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; CHECK: *(u16 *)([[DST_REG:r[0-9]]] + 0) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 2)
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; CHECK: *(u16 *)([[DST_REG]] + 2) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 4)
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; CHECK: *(u16 *)([[DST_REG]] + 4) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 6)
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; CHECK: *(u16 *)([[DST_REG]] + 6) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 8)
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; CHECK: *(u8 *)([[DST_REG]] + 8) = [[SCRATCH_REG]]
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; Function Attrs: nounwind
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define dso_local void @cal_align4(ptr nocapture %a, ptr nocapture readonly %b) local_unnamed_addr #0 {
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entry:
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tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %a, ptr align 4 %b, i64 19, i1 false)
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ret void
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}
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; CHECK: [[SCRATCH_REG:r[0-9]]] = *(u32 *)([[SRC_REG:r[0-9]]] + 0)
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; CHECK: *(u32 *)([[DST_REG:r[0-9]]] + 0) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u32 *)([[SRC_REG]] + 4)
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; CHECK: *(u32 *)([[DST_REG]] + 4) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u32 *)([[SRC_REG]] + 8)
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; CHECK: *(u32 *)([[DST_REG]] + 8) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u32 *)([[SRC_REG]] + 12)
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; CHECK: *(u32 *)([[DST_REG]] + 12) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 16)
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; CHECK: *(u16 *)([[DST_REG]] + 16) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 18)
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; CHECK: *(u8 *)([[DST_REG]] + 18) = [[SCRATCH_REG]]
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; Function Attrs: nounwind
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define dso_local void @cal_align8(ptr nocapture %a, ptr nocapture readonly %b) local_unnamed_addr #0 {
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entry:
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tail call void @llvm.memcpy.p0.p0.i64(ptr align 8 %a, ptr align 8 %b, i64 27, i1 false)
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ret void
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}
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; CHECK: [[SCRATCH_REG:r[0-9]]] = *(u64 *)([[SRC_REG:r[0-9]]] + 0)
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; CHECK: *(u64 *)([[DST_REG:r[0-9]]] + 0) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u64 *)([[SRC_REG]] + 8)
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; CHECK: *(u64 *)([[DST_REG]] + 8) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u64 *)([[SRC_REG]] + 16)
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; CHECK: *(u64 *)([[DST_REG]] + 16) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 24)
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; CHECK: *(u16 *)([[DST_REG]] + 24) = [[SCRATCH_REG]]
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; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 26)
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; CHECK: *(u8 *)([[DST_REG]] + 26) = [[SCRATCH_REG]]
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