derek.holloway
7502bf64a4
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61 lines
2.5 KiB
LLVM
61 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -dxil-intrinsic-expansion -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
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; Make sure dxil operation function calls for pow are generated.
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define noundef i16 @usub_sat_i16(i16 noundef %a, i16 noundef %b) {
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; CHECK-LABEL: define noundef i16 @usub_sat_i16(
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; CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[USUB_CMP:%.*]] = icmp ult i16 [[A]], [[B]]
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; CHECK-NEXT: [[USUB_SUB:%.*]] = sub i16 [[A]], [[B]]
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; CHECK-NEXT: [[ELT_USUB_SAT:%.*]] = select i1 [[USUB_CMP]], i16 0, i16 [[USUB_SUB]]
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; CHECK-NEXT: ret i16 [[ELT_USUB_SAT]]
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;
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entry:
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%elt.usub_sat = call i16 @llvm.usub.sat.i16(i16 %a, i16 %b)
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ret i16 %elt.usub_sat
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}
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define noundef i32 @usub_sat_i32(i32 noundef %a, i32 noundef %b) {
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; CHECK-LABEL: define noundef i32 @usub_sat_i32(
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; CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[USUB_CMP:%.*]] = icmp ult i32 [[A]], [[B]]
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; CHECK-NEXT: [[USUB_SUB:%.*]] = sub i32 [[A]], [[B]]
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; CHECK-NEXT: [[ELT_USUB_SAT:%.*]] = select i1 [[USUB_CMP]], i32 0, i32 [[USUB_SUB]]
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; CHECK-NEXT: ret i32 [[ELT_USUB_SAT]]
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;
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entry:
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%elt.usub_sat = call i32 @llvm.usub.sat.i32(i32 %a, i32 %b)
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ret i32 %elt.usub_sat
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}
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define noundef i64 @usub_sat_i64(i64 noundef %a, i64 noundef %b) {
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; CHECK-LABEL: define noundef i64 @usub_sat_i64(
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; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[USUB_CMP:%.*]] = icmp ult i64 [[A]], [[B]]
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; CHECK-NEXT: [[USUB_SUB:%.*]] = sub i64 [[A]], [[B]]
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; CHECK-NEXT: [[ELT_USUB_SAT:%.*]] = select i1 [[USUB_CMP]], i64 0, i64 [[USUB_SUB]]
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; CHECK-NEXT: ret i64 [[ELT_USUB_SAT]]
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;
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entry:
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%elt.usub_sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
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ret i64 %elt.usub_sat
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}
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define noundef <4 x i32> @usub_sat_vec(<4 x i32> noundef %a, <4 x i32> noundef %b) {
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; CHECK-LABEL: define noundef <4 x i32> @usub_sat_vec(
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; CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[USUB_CMP:%.*]] = icmp ult <4 x i32> [[A]], [[B]]
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; CHECK-NEXT: [[USUB_SUB:%.*]] = sub <4 x i32> [[A]], [[B]]
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; CHECK-NEXT: [[ELT_USUB_SAT:%.*]] = select <4 x i1> [[USUB_CMP]], <4 x i32> zeroinitializer, <4 x i32> [[USUB_SUB]]
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; CHECK-NEXT: ret <4 x i32> [[ELT_USUB_SAT]]
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;
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entry:
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%elt.usub_sat = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %a, <4 x i32> %b)
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ret <4 x i32> %elt.usub_sat
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}
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