derek.holloway
7502bf64a4
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93 lines
2.3 KiB
LLVM
93 lines
2.3 KiB
LLVM
; RUN: llc -mtriple=hexagon < %s | FileCheck %s
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;
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; Bug 6840. Use absolute+index addressing.
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@ga = common global [1024 x i8] zeroinitializer, align 8
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; CHECK-LABEL: test0
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; CHECK: memub(r{{[0-9]+}}+##ga)
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define zeroext i8 @test0(i32 %i) nounwind readonly {
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entry:
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%t = getelementptr inbounds [1024 x i8], ptr @ga, i32 0, i32 %i
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%0 = load i8, ptr %t, align 1
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ret i8 %0
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}
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; CHECK-LABEL: test1
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; CHECK: memb(r{{[0-9]+}}+##ga)
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define signext i8 @test1(i32 %i) nounwind readonly {
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entry:
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%t = getelementptr inbounds [1024 x i8], ptr @ga, i32 0, i32 %i
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%0 = load i8, ptr %t, align 1
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ret i8 %0
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}
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; CHECK-LABEL: test2
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; CHECK: memub(r{{[0-9]+}}<<#1+##ga)
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define zeroext i8 @test2(i32 %i) nounwind readonly {
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entry:
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%j = shl nsw i32 %i, 1
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%t = getelementptr inbounds [1024 x i8], ptr @ga, i32 0, i32 %j
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%0 = load i8, ptr %t, align 1
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ret i8 %0
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}
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; CHECK-LABEL: test3
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; CHECK: memb(r{{[0-9]+}}<<#1+##ga)
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define signext i8 @test3(i32 %i) nounwind readonly {
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entry:
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%j = shl nsw i32 %i, 1
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%t = getelementptr inbounds [1024 x i8], ptr @ga, i32 0, i32 %j
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%0 = load i8, ptr %t, align 1
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ret i8 %0
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}
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; CHECK-LABEL: test4
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; CHECK: memub(r{{[0-9]+}}<<#2+##ga)
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define zeroext i8 @test4(i32 %i) nounwind readonly {
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entry:
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%j = shl nsw i32 %i, 2
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%t = getelementptr inbounds [1024 x i8], ptr @ga, i32 0, i32 %j
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%0 = load i8, ptr %t, align 1
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ret i8 %0
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}
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; CHECK-LABEL: test5
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; CHECK: memb(r{{[0-9]+}}<<#2+##ga)
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define signext i8 @test5(i32 %i) nounwind readonly {
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entry:
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%j = shl nsw i32 %i, 2
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%t = getelementptr inbounds [1024 x i8], ptr @ga, i32 0, i32 %j
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%0 = load i8, ptr %t, align 1
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ret i8 %0
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}
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; CHECK-LABEL: test10
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; CHECK: memb(r{{[0-9]+}}+##ga)
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define void @test10(i32 %i, i8 zeroext %v) nounwind {
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entry:
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%t = getelementptr inbounds [1024 x i8], ptr @ga, i32 0, i32 %i
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store i8 %v, ptr %t, align 1
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ret void
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}
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; CHECK-LABEL: test11
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; CHECK: memb(r{{[0-9]+}}<<#1+##ga)
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define void @test11(i32 %i, i8 signext %v) nounwind {
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entry:
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%j = shl nsw i32 %i, 1
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%t = getelementptr inbounds [1024 x i8], ptr @ga, i32 0, i32 %j
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store i8 %v, ptr %t, align 1
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ret void
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}
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; CHECK-LABEL: test12
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; CHECK: memb(r{{[0-9]+}}<<#2+##ga)
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define void @test12(i32 %i, i8 zeroext %v) nounwind {
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entry:
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%j = shl nsw i32 %i, 2
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%t = getelementptr inbounds [1024 x i8], ptr @ga, i32 0, i32 %j
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store i8 %v, ptr %t, align 1
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ret void
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}
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