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37 lines
1.5 KiB
LLVM
37 lines
1.5 KiB
LLVM
; RUN: llc -O3 -mtriple=hexagon < %s | FileCheck %s
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; We do not want the opt-addr-mode pass to modify the addi instructions whose
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; base register has a predicated register definition
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; CHECK: if ({{.*}}) [[REG1:r([0-9]+)]] = {{.*}}
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; CHECK: r{{[0-9]+}} = add([[REG1]],#{{[0-9]+}})
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; CHECK: r{{[0-9]+}} = add([[REG1]],#{{[0-9]+}})
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@seqToUnseq = external dso_local local_unnamed_addr global [256 x i8], align 8
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@unseqToSeq = external dso_local local_unnamed_addr global [256 x i8], align 8
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define dso_local void @makeMaps() local_unnamed_addr {
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entry:
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br label %for.body
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for.body: ; preds = %for.inc.3, %entry
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%0 = phi i32 [ 0, %entry ], [ %inc.7, %for.inc.3 ]
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%inc.1 = add nsw i32 %0, 1
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br i1 undef, label %for.inc.3, label %if.then.3
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if.then.3: ; preds = %for.body
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%arrayidx1.3 = getelementptr inbounds [256 x i8], [256 x i8]* @seqToUnseq, i32 0, i32 %inc.1
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store i8 undef, i8* %arrayidx1.3, align 1
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br label %for.inc.3
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for.inc.3: ; preds = %if.then.3, %for.body
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%1 = phi i32 [ %inc.1, %for.body ], [ 0, %if.then.3 ]
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%arrayidx3.4 = getelementptr inbounds [256 x i8], [256 x i8]* @unseqToSeq, i32 0, i32 undef
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store i8 0, i8* %arrayidx3.4, align 4
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%inc.4 = add nsw i32 %1, 1
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%conv2.7 = trunc i32 %inc.4 to i8
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%arrayidx3.7 = getelementptr inbounds [256 x i8], [256 x i8]* @unseqToSeq, i32 0, i32 undef
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store i8 %conv2.7, i8* %arrayidx3.7, align 1
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%inc.7 = add nsw i32 %inc.4, 1
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br label %for.body
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}
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