derek.holloway
7502bf64a4
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18 lines
603 B
LLVM
18 lines
603 B
LLVM
; RUN: llc -mtriple=hexagon < %s | FileCheck %s
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; This has a v32i8 = truncate v16i32 (64b mode), which was legalized to
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; 64i8 = vpackl v32i32, for which there were no selection patterns provided.
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; Check that we generate vpackeh->vpackeb for this.
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; CHECK-LABEL: fred:
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; CHECK: v[[V0:[0-9]+]].h = vpacke(v1.w,v0.w)
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; CHECK: = vpacke({{.*}},v[[V0]].h)
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define void @fred(ptr %a0, <32 x i32> %a1) #0 {
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%v0 = trunc <32 x i32> %a1 to <32 x i8>
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store <32 x i8> %v0, ptr %a0, align 32
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ret void
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}
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attributes #0 = { "target-cpu"="hexagonv65" "target-features"="+hvx,+hvx-length64b" }
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