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46 lines
1.8 KiB
LLVM
46 lines
1.8 KiB
LLVM
; RUN: llc -march=hexagon -hexagon-hvx-widen=32 -hvc-ld-min-group-size-for-alignment=2 < %s | FileCheck %s
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; Test that the Hexagon Vector Combine pass computes the address
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; correctly when the loading objects that contain extra padding
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; between successive objects.
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; CHECK: [[REG:r[0-9]+]] = add(r{{[0-9]+}},#2432)
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; CHECK: = vmem([[REG]]+#0)
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define dllexport void @test(ptr %a0) local_unnamed_addr #0 {
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b0:
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%v0 = add nuw nsw i32 0, 3040
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%v1 = load i8, ptr undef, align 1
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%v2 = insertelement <19 x i8> undef, i8 %v1, i32 0
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%v3 = shufflevector <19 x i8> %v2, <19 x i8> undef, <19 x i32> zeroinitializer
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%v4 = getelementptr inbounds i8, ptr %a0, i32 %v0
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%v6 = load <19 x i8>, ptr %v4, align 1
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%v7 = mul <19 x i8> %v3, %v6
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%v8 = add <19 x i8> %v7, zeroinitializer
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%v9 = add <19 x i8> zeroinitializer, %v8
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%v10 = add <19 x i8> zeroinitializer, %v9
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%v11 = add <19 x i8> zeroinitializer, %v10
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%v12 = add <19 x i8> zeroinitializer, %v11
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%v13 = add <19 x i8> zeroinitializer, %v12
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%v14 = add <19 x i8> zeroinitializer, %v13
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%v15 = add <19 x i8> zeroinitializer, %v14
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%v16 = add <19 x i8> zeroinitializer, %v15
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%v17 = add <19 x i8> zeroinitializer, %v16
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%v18 = add <19 x i8> zeroinitializer, %v17
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%v19 = load i8, ptr undef, align 1
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%v20 = insertelement <19 x i8> undef, i8 %v19, i32 0
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%v21 = shufflevector <19 x i8> %v20, <19 x i8> undef, <19 x i32> zeroinitializer
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%v22 = add nuw nsw i32 0, 5472
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%v23 = getelementptr inbounds i8, ptr %a0, i32 %v22
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%v25 = load <19 x i8>, ptr %v23, align 1
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%v26 = mul <19 x i8> %v21, %v25
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%v27 = add <19 x i8> %v26, %v18
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%v28 = add <19 x i8> zeroinitializer, %v27
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%v29 = add <19 x i8> zeroinitializer, %v28
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%v30 = add <19 x i8> zeroinitializer, %v29
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store <19 x i8> %v30, ptr %a0, align 1
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ret void
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}
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attributes #0 = { "target-features"="+hvxv66,+hvx-length128b" }
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