derek.holloway
7502bf64a4
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48 lines
1.1 KiB
LLVM
48 lines
1.1 KiB
LLVM
; RUN: llc -mtriple=hexagon < %s
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; REQUIRES: asserts
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; Test that the HexagonExpandCondsets pass does not assert due to
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; attempting to shrink a live interval incorrectly.
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define void @test() #0 {
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entry:
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br i1 undef, label %cleanup, label %if.end
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if.end:
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%0 = load i32, ptr undef, align 4
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%sext = shl i32 %0, 16
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%conv19 = ashr exact i32 %sext, 16
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br i1 undef, label %cleanup, label %for.body.lr.ph
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for.body.lr.ph:
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br label %for.body
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for.body:
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%bestScoreL16Q4.0278 = phi i16 [ 32767, %for.body.lr.ph ], [ %.sink, %early_termination ]
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br i1 false, label %for.body44.lr.ph, label %for.cond90.preheader
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for.body44.lr.ph:
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%conv77 = sext i16 %bestScoreL16Q4.0278 to i32
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unreachable
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for.cond90.preheader:
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br i1 undef, label %early_termination, label %for.body97
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for.body97:
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br i1 undef, label %for.body97, label %early_termination
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early_termination:
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%.sink = select i1 undef, i16 undef, i16 %bestScoreL16Q4.0278
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%cmp27 = icmp slt i32 undef, %conv19
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br i1 %cmp27, label %for.body, label %for.end124
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for.end124:
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unreachable
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cleanup:
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv60" }
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