derek.holloway
7502bf64a4
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123 lines
5.5 KiB
LLVM
123 lines
5.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -p hexagon-loop-idiom -S < %s | FileCheck %s
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target triple = "hexagon"
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; There need to be two pmpy instructions.
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define zeroext i16 @pmpy_trunc(i8 zeroext %a0, i16 zeroext %a1) local_unnamed_addr {
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; CHECK-LABEL: define zeroext i16 @pmpy_trunc(
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; CHECK-SAME: i8 zeroext [[A0:%.*]], i16 zeroext [[A1:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[B1:.*]]:
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; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[A1]] to i32
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; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A0]] to i32
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; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 255
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; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.hexagon.M4.pmpyw(i32 [[TMP3]], i32 255)
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; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i32
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP5]], 255
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; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.hexagon.M4.pmpyw(i32 [[TMP6]], i32 81922)
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; CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP2]] to i64
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; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP7]], [[TMP8]]
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; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP9]] to i32
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; CHECK-NEXT: br label %[[B2:.*]]
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; CHECK: [[B2]]:
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; CHECK-NEXT: [[PHI1:%.*]] = phi i32 [ 0, %[[B1]] ], [ [[ADD:%.*]], %[[B2]] ]
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; CHECK-NEXT: [[PHI2:%.*]] = phi i32 [ [[TMP0]], %[[B1]] ], [ [[TMP10]], %[[B2]] ]
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; CHECK-NEXT: [[TMP11:%.*]] = xor i32 [[PHI2]], [[TMP1]]
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; CHECK-NEXT: [[TMP12:%.*]] = shl i32 1, [[PHI1]]
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; CHECK-NEXT: [[TMP13:%.*]] = and i32 [[TMP11]], [[TMP12]]
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; CHECK-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
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; CHECK-NEXT: [[TMP15:%.*]] = shl i32 81922, [[PHI1]]
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; CHECK-NEXT: [[TMP16:%.*]] = xor i32 [[PHI2]], [[TMP15]]
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; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[PHI1]], 1
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; CHECK-NEXT: [[ICMP:%.*]] = icmp samesign ult i32 [[PHI1]], 7
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; CHECK-NEXT: br i1 [[ICMP]], label %[[B2]], label %[[B3:.*]]
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; CHECK: [[B3]]:
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; CHECK-NEXT: [[SELECT_LCSSA:%.*]] = phi i32 [ [[TMP10]], %[[B2]] ]
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; CHECK-NEXT: [[TMP17:%.*]] = lshr i32 [[SELECT_LCSSA]], 8
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; CHECK-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i16
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; CHECK-NEXT: ret i16 [[TMP18]]
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;
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b1:
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br label %b2
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b2: ; preds = %b1, %b2
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%phi1 = phi i8 [ 0, %b1 ], [ %add, %b2 ]
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%phi2 = phi i16 [ %a1, %b1 ], [ %select, %b2 ]
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%phi3 = phi i8 [ %a0, %b1 ], [ %lshr1, %b2 ]
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%trunc1 = trunc i16 %phi2 to i8
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%xor1 = xor i8 %phi3, %trunc1
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%lshr1 = lshr i8 %phi3, 1
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%trunc2 = trunc i8 %xor1 to i1
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%lshr2 = lshr i16 %phi2, 1
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%xor2 = xor i16 %lshr2, -24575
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%select = select i1 %trunc2, i16 %xor2, i16 %lshr2
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%add = add nuw nsw i8 %phi1, 1
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%icmp = icmp samesign ult i8 %phi1, 7
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br i1 %icmp, label %b2, label %b3
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b3: ; preds = %b2
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%select.lcssa = phi i16 [ %select, %b2 ]
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ret i16 %select.lcssa
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}
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; There need to be two pmpy instructions.
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define zeroext i16 @pmpy_trunc_not(i8 zeroext %a0, i16 zeroext %a1) local_unnamed_addr {
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; CHECK-LABEL: define zeroext i16 @pmpy_trunc_not(
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; CHECK-SAME: i8 zeroext [[A0:%.*]], i16 zeroext [[A1:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[B1:.*]]:
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; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[A1]] to i32
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; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A0]] to i32
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; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 255
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; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.hexagon.M4.pmpyw(i32 [[TMP3]], i32 255)
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; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i32
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP5]], 255
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; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.hexagon.M4.pmpyw(i32 [[TMP6]], i32 81922)
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; CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP2]] to i64
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; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP7]], [[TMP8]]
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; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP9]] to i32
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; CHECK-NEXT: br label %[[B2:.*]]
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; CHECK: [[B2]]:
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; CHECK-NEXT: [[PHI1:%.*]] = phi i32 [ 0, %[[B1]] ], [ [[ADD:%.*]], %[[B2]] ]
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; CHECK-NEXT: [[PHI2:%.*]] = phi i32 [ [[TMP0]], %[[B1]] ], [ [[TMP10]], %[[B2]] ]
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; CHECK-NEXT: [[TMP11:%.*]] = xor i32 [[PHI2]], [[TMP1]]
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; CHECK-NEXT: [[TMP12:%.*]] = shl i32 1, [[PHI1]]
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; CHECK-NEXT: [[TMP13:%.*]] = and i32 [[TMP11]], [[TMP12]]
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; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP13]], 0
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; CHECK-NEXT: [[TMP15:%.*]] = shl i32 81922, [[PHI1]]
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; CHECK-NEXT: [[TMP16:%.*]] = xor i32 [[PHI2]], [[TMP15]]
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; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[PHI1]], 1
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; CHECK-NEXT: [[ICMP:%.*]] = icmp samesign ult i32 [[PHI1]], 7
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; CHECK-NEXT: br i1 [[ICMP]], label %[[B2]], label %[[B3:.*]]
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; CHECK: [[B3]]:
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; CHECK-NEXT: [[SELECT_LCSSA1:%.*]] = phi i32 [ [[TMP10]], %[[B2]] ]
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; CHECK-NEXT: [[TMP17:%.*]] = lshr i32 [[SELECT_LCSSA1]], 8
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; CHECK-NEXT: [[SELECT_LCSSA:%.*]] = trunc i32 [[TMP17]] to i16
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; CHECK-NEXT: ret i16 [[SELECT_LCSSA]]
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;
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b1:
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br label %b2
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b2: ; preds = %b1, %b2
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%phi1 = phi i8 [ 0, %b1 ], [ %add, %b2 ]
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%phi2 = phi i16 [ %a1, %b1 ], [ %select, %b2 ]
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%phi3 = phi i8 [ %a0, %b1 ], [ %lshr1, %b2 ]
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%trunc1 = trunc i16 %phi2 to i8
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%xor1 = xor i8 %phi3, %trunc1
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%lshr1 = lshr i8 %phi3, 1
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%trunc2 = trunc i8 %xor1 to i1
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%not = xor i1 %trunc2, true
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%lshr2 = lshr i16 %phi2, 1
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%xor2 = xor i16 %lshr2, -24575
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%select = select i1 %not, i16 %lshr2, i16 %xor2
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%add = add nuw nsw i8 %phi1, 1
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%icmp = icmp samesign ult i8 %phi1, 7
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br i1 %icmp, label %b2, label %b3
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b3: ; preds = %b2
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%select.lcssa = phi i16 [ %select, %b2 ]
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ret i16 %select.lcssa
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}
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