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96 lines
3.3 KiB
YAML
96 lines
3.3 KiB
YAML
# RUN: llc -march=hexagon -mcpu=hexagonv68 -mattr=+hvxv68,+hvx-length128b \
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# RUN: -run-pass hexagon-qfp-optimizer -run-pass machineverifier %s -o - | FileCheck %s
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# Test that the killed RegState from DefMI operands are removed
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# killed RegState should be set for MI operands
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# CHECK-LABEL: name: qfpAdd
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# CHECK: %{{[0-9]+}}:hvxvr = V6_vconv_sf_qf32 %[[REG1:([0-9]+)]]
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# CHECK-NEXT: %{{[0-9]+}}:hvxvr = V6_vconv_sf_qf32 %[[REG2:([0-9]+)]]
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# CHECK-NEXT: V6_vadd_qf32 killed %[[REG1]], killed %[[REG2]]
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# CHECK-NEXT: %{{[0-9]+}}:hvxvr = V6_vconv_sf_qf32 %[[REG3:([0-9]+)]]
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# CHECK-NEXT: %{{[0-9]+}}:hvxvr = V6_vconv_sf_qf32 %[[REG4:([0-9]+)]]
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# CHECK-NEXT: V6_vadd_qf32 killed %[[REG3]], killed %[[REG4]]
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---
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name: qfpAdd
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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%0:intregs = COPY $r0
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%1:intregs = COPY $r1
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%2:intregs = COPY $r2
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%3:intregs = COPY $r3
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%4:hvxvr = V6_vL32Ub_ai %0:intregs, 0
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%5:hvxvr = V6_vL32Ub_ai %1:intregs, 0
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%6:hvxvr = V6_vL32Ub_ai %2:intregs, 0
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%7:hvxvr = V6_vL32Ub_ai %3:intregs, 0
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%8:hvxvr = V6_vconv_sf_qf32 killed %4:hvxvr
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%9:hvxvr = V6_vconv_sf_qf32 killed %5:hvxvr
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%10:hvxvr = V6_vadd_sf %8:hvxvr, %9:hvxvr
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%11:hvxvr = V6_vconv_sf_qf32 killed %6:hvxvr
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%12:hvxvr = V6_vconv_sf_qf32 killed %7:hvxvr
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%13:hvxvr = V6_vadd_sf killed %11:hvxvr, killed %12:hvxvr
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...
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# Test that the killed RegState from DefMI operands are removed
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# CHECK-LABEL: name: qfpAddMix
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# CHECK: %{{[0-9]+}}:hvxvr = V6_vconv_sf_qf32 %[[REG1:([0-9]+)]]
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# CHECK-NEXT: V6_vadd_qf32_mix killed %[[REG1]], %{{[0-9]+}}
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# CHECK: %{{[0-9]+}}:hvxvr = V6_vconv_sf_qf32 %[[REG2:([0-9]+)]]
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# CHECK-NEXT: V6_vadd_qf32_mix killed %[[REG2]], %{{[0-9]+}}
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---
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name: qfpAddMix
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2
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%0:intregs = COPY $r0
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%1:intregs = COPY $r1
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%2:intregs = COPY $r2
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%3:hvxvr = V6_vL32Ub_ai %0:intregs, 0
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%4:hvxvr = V6_vL32Ub_ai %1:intregs, 0
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%5:hvxvr = V6_vL32Ub_ai %2:intregs, 0
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%6:hvxvr = V6_vmpy_qf32_sf %4, %5
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%7:hvxvr = V6_vconv_sf_qf32 killed %6:hvxvr
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%8:hvxvr = V6_vadd_sf %3:hvxvr, %7:hvxvr
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%9:hvxvr = V6_vmpy_qf32_sf %4, %5
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%10:hvxvr = V6_vconv_sf_qf32 killed %9:hvxvr
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%11:hvxvr = V6_vadd_sf %3:hvxvr, killed %10:hvxvr
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...
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# Test that we do generate V6_vsub_qf32_mix for the below test.
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# V6_vsub_qf32_mix only allowes qf32 as first operand. In the test qf32
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# is passed as first operand. So, V6_vsub_qf32_mix must be generated.
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# CHECK-LABEL: name: qfpAddSwapMix
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# CHECK: %{{[0-9]+}}:hvxvr = V6_vconv_sf_qf32 %[[REG1:([0-9]+)]]
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# CHECK-NEXT: V6_vadd_qf32_mix killed %[[REG1]], %{{[0-9]+}}
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# CHECK: %{{[0-9]+}}:hvxvr = V6_vconv_sf_qf32 %[[REG2:([0-9]+)]]
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# CHECK-NEXT: V6_vadd_qf32_mix killed %[[REG2]], %{{[0-9]+}}
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---
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name: qfpAddSwapMix
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2
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%0:intregs = COPY $r0
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%1:intregs = COPY $r1
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%2:intregs = COPY $r2
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%3:hvxvr = V6_vL32Ub_ai %0:intregs, 0
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%4:hvxvr = V6_vL32Ub_ai %1:intregs, 0
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%5:hvxvr = V6_vL32Ub_ai %2:intregs, 0
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%6:hvxvr = V6_vmpy_qf32_sf %4, %5
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%7:hvxvr = V6_vconv_sf_qf32 killed %6:hvxvr
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%8:hvxvr = V6_vadd_sf %7:hvxvr, %3:hvxvr
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%9:hvxvr = V6_vmpy_qf32_sf %4, %5
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%10:hvxvr = V6_vconv_sf_qf32 killed %9:hvxvr
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%11:hvxvr = V6_vadd_sf killed %10:hvxvr, %3:hvxvr
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...
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