derek.holloway
7502bf64a4
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25 lines
677 B
LLVM
25 lines
677 B
LLVM
; RUN: llc -mtriple=hexagon -enable-pipeliner < %s
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; REQUIRES: asserts
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%s.0 = type { i64 }
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define i64 @f0(ptr nocapture %a0, i32 %a1) {
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b0:
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br i1 undef, label %b1, label %b2
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b1: ; preds = %b1, %b0
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%v0 = phi i32 [ %v6, %b1 ], [ 0, %b0 ]
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%v1 = phi i64 [ %v5, %b1 ], [ undef, %b0 ]
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%v2 = load i16, ptr undef, align 2
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%v3 = zext i16 %v2 to i64
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%v4 = and i64 %v1, -4294967296
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%v5 = or i64 %v3, %v4
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%v6 = add nsw i32 %v0, 1
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%v7 = icmp eq i32 %v6, %a1
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br i1 %v7, label %b2, label %b1
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b2: ; preds = %b1, %b0
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%v8 = phi i64 [ undef, %b0 ], [ %v5, %b1 ]
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ret i64 %v8
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}
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