derek.holloway
7502bf64a4
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35 lines
1.1 KiB
LLVM
35 lines
1.1 KiB
LLVM
; RUN: llc -mtriple=hexagon -enable-pipeliner -fp-contract=fast < %s
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; REQUIRES: asserts
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; Test that the code which reuses existing Phis works when the Phis are used
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; in multiple stages. In this case, one can be reused, but the other must be
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; generated.
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; Function Attrs: nounwind
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define void @f0(i32 %a0) #0 {
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b0:
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%v0 = icmp sgt i32 %a0, 0
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br i1 %v0, label %b1, label %b2
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b1: ; preds = %b1, %b0
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%v1 = phi i32 [ %v11, %b1 ], [ 0, %b0 ]
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%v2 = phi float [ %v4, %b1 ], [ undef, %b0 ]
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%v3 = phi float [ %v2, %b1 ], [ undef, %b0 ]
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%v4 = load float, ptr undef, align 4
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%v5 = fmul float %v4, 0x3FEFAA0000000000
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%v6 = fadd float undef, %v5
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%v7 = fmul float %v2, 0xBFFFAA0000000000
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%v8 = fadd float %v7, %v6
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%v9 = fmul float %v3, 0x3FEFAA0000000000
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%v10 = fadd float %v9, %v8
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store float %v10, ptr undef, align 4
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%v11 = add nsw i32 %v1, 1
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%v12 = icmp eq i32 %v11, %a0
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br i1 %v12, label %b2, label %b1
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b2: ; preds = %b1, %b0
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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