derek.holloway
7502bf64a4
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34 lines
1.6 KiB
LLVM
34 lines
1.6 KiB
LLVM
; RUN: llc -no-integrated-as -mtriple=hexagon -mcpu=hexagonv60 -mattr=+hvxv60,hvx-length64b -disable-hexagon-shuffle=0 -O2 -enable-hexagon-vector-print < %s | FileCheck --check-prefix=CHECK %s
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; RUN: llc -no-integrated-as -mtriple=hexagon -mcpu=hexagonv60 -mattr=+hvxv60,hvx-length64b -disable-hexagon-shuffle=0 -O2 -enable-hexagon-vector-print -trace-hex-vector-stores-only < %s | FileCheck --check-prefix=VSTPRINT %s
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; generate .long XXXX which is a vector debug print instruction.
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; CHECK: .long 0x1dffe0
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; CHECK: .long 0x1dffe0
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; CHECK: .long 0x1dffe0
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; VSTPRINT: .long 0x1dffe0
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; VSTPRINT-NOT: .long 0x1dffe0
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target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a:0-n16:32"
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target triple = "hexagon"
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; Function Attrs: nounwind
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define void @do_vecs(ptr nocapture readonly %a, ptr nocapture readonly %b, ptr nocapture %c) #0 {
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entry:
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%0 = load <16 x i32>, ptr %a, align 4, !tbaa !1
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%1 = load <16 x i32>, ptr %b, align 4, !tbaa !1
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%2 = tail call <16 x i32> @llvm.hexagon.V6.vaddw(<16 x i32> %0, <16 x i32> %1)
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store <16 x i32> %2, ptr %c, align 4, !tbaa !1
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ret void
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}
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; Function Attrs: nounwind readnone
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declare <16 x i32> @llvm.hexagon.V6.vaddw(<16 x i32>, <16 x i32>) #1
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attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" }
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attributes #1 = { nounwind readnone }
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!llvm.ident = !{!0}
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!0 = !{!"QuIC LLVM Hexagon Clang version 7.x-pre-unknown"}
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!1 = !{!2, !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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