derek.holloway
7502bf64a4
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98 lines
1.9 KiB
YAML
98 lines
1.9 KiB
YAML
# RUN: llc -march=hexagon -mcpu=hexagonv68 -mattr=+hvxv68,+hvx-length128b \
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# RUN: -run-pass hexagon-qfp-optimizer %s -o - | FileCheck %s
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# CHECK: name: qfp_vilog32
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# CHECK: V6_vilog2_qf32
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---
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name: qfp_vilog32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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$v0 = V6_vL32Ub_ai $r0, 0
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$v1 = V6_vconv_sf_qf32 $v0
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$v2 = V6_vilog2_sf $v1
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V6_vS32Ub_ai $r2, 0, $v2
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...
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# CHECK-LABEL: name: qfp_vilog16
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# CHECK: V6_vilog2_qf16
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---
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name: qfp_vilog16
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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$v0 = V6_vL32Ub_ai $r0, 0
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$v1 = V6_vconv_hf_qf16 $v0
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$v2 = V6_vilog2_hf $v1
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V6_vS32Ub_ai $r2, 0, $v2
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...
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# CHECK: name: qfp_vneg32
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# CHECK: V6_vneg_qf32_qf32
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---
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name: qfp_vneg32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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$v0 = V6_vL32Ub_ai $r0, 0
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$v1 = V6_vconv_sf_qf32 $v0
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$v2 = V6_vneg_qf32_sf $v1
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$v3 = V6_vconv_sf_qf32 $v2
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V6_vS32Ub_ai $r2, 0, $v3
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...
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# CHECK-LABEL: name: qfp_vneg16
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# CHECK: V6_vneg_qf16_qf16
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---
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name: qfp_vneg16
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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$v0 = V6_vL32Ub_ai $r0, 0
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$v1 = V6_vconv_hf_qf16 $v0
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$v2 = V6_vneg_qf16_hf $v1
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$v3 = V6_vconv_hf_qf16 $v2
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V6_vS32Ub_ai $r2, 0, $v3
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...
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# CHECK: name: qfp_vabs32
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# CHECK: V6_vabs_qf32_qf32
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---
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name: qfp_vabs32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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$v0 = V6_vL32Ub_ai $r0, 0
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$v1 = V6_vconv_sf_qf32 $v0
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$v2 = V6_vabs_qf32_sf $v1
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$v3 = V6_vconv_sf_qf32 $v2
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V6_vS32Ub_ai $r2, 0, $v3
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...
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# CHECK-LABEL: name: qfp_vabs16
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# CHECK: V6_vabs_qf16_qf16
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---
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name: qfp_vabs16
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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$v0 = V6_vL32Ub_ai $r0, 0
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$v1 = V6_vconv_hf_qf16 $v0
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$v2 = V6_vabs_qf16_hf $v1
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$v3 = V6_vconv_hf_qf16 $v2
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V6_vS32Ub_ai $r2, 0, $v3
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...
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