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33 lines
1.2 KiB
YAML
33 lines
1.2 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc --mtriple=loongarch64 --mattr=+d --regalloc=fast \
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# RUN: --stop-before=postra-machine-sink %s -o - | FileCheck %s
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## Check that fcc register clobbered by inlineasm is correctly saved by examing
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## a pair of pseudos (PseudoST_CFR and PseudoLD_CFR) are generated before and
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## after the INLINEASM.
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...
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---
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name: test
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $f0_64, $f1_64
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; CHECK-LABEL: name: test
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; CHECK: liveins: $f0_64, $f1_64
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $fcc0 = FCMP_CLT_D renamable $f1_64, renamable $f0_64
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; CHECK-NEXT: PseudoST_CFR $fcc0, %stack.0, 0 :: (store (s64) into %stack.0)
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; CHECK-NEXT: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead early-clobber $fcc0
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; CHECK-NEXT: $fcc0 = PseudoLD_CFR %stack.0, 0 :: (load (s64) from %stack.0)
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; CHECK-NEXT: $r4 = COPY killed renamable $fcc0
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; CHECK-NEXT: PseudoRET implicit killed $r4
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%1:fpr64 = COPY $f1_64
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%0:fpr64 = COPY $f0_64
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%2:cfr = FCMP_CLT_D %1, %0
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INLINEASM &"nop", sideeffect attdialect, clobber, implicit-def dead early-clobber $fcc0
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$r4 = COPY %2
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PseudoRET implicit killed $r4
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...
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