derek.holloway
7502bf64a4
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352 lines
11 KiB
LLVM
352 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
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; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
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declare <8 x i32> @llvm.loongarch.lasx.xvftintrne.w.s(<8 x float>)
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define <8 x i32> @lasx_xvftintrne_w_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrne_w_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrne.w.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftintrne.w.s(<8 x float> %va)
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ret <8 x i32> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrne.l.d(<4 x double>)
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define <4 x i64> @lasx_xvftintrne_l_d(<4 x double> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrne_l_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrne.l.d $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrne.l.d(<4 x double> %va)
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ret <4 x i64> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftintrz.w.s(<8 x float>)
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define <8 x i32> @lasx_xvftintrz_w_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrz_w_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrz.w.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftintrz.w.s(<8 x float> %va)
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ret <8 x i32> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrz.l.d(<4 x double>)
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define <4 x i64> @lasx_xvftintrz_l_d(<4 x double> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrz_l_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrz.l.d $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrz.l.d(<4 x double> %va)
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ret <4 x i64> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftintrp.w.s(<8 x float>)
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define <8 x i32> @lasx_xvftintrp_w_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrp_w_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrp.w.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftintrp.w.s(<8 x float> %va)
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ret <8 x i32> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrp.l.d(<4 x double>)
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define <4 x i64> @lasx_xvftintrp_l_d(<4 x double> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrp_l_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrp.l.d $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrp.l.d(<4 x double> %va)
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ret <4 x i64> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftintrm.w.s(<8 x float>)
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define <8 x i32> @lasx_xvftintrm_w_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrm_w_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrm.w.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftintrm.w.s(<8 x float> %va)
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ret <8 x i32> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrm.l.d(<4 x double>)
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define <4 x i64> @lasx_xvftintrm_l_d(<4 x double> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrm_l_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrm.l.d $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrm.l.d(<4 x double> %va)
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ret <4 x i64> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftint.w.s(<8 x float>)
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define <8 x i32> @lasx_xvftint_w_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftint_w_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftint.w.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftint.w.s(<8 x float> %va)
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ret <8 x i32> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftint.l.d(<4 x double>)
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define <4 x i64> @lasx_xvftint_l_d(<4 x double> %va) nounwind {
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; CHECK-LABEL: lasx_xvftint_l_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftint.l.d $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftint.l.d(<4 x double> %va)
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ret <4 x i64> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftintrz.wu.s(<8 x float>)
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define <8 x i32> @lasx_xvftintrz_wu_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrz_wu_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrz.wu.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftintrz.wu.s(<8 x float> %va)
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ret <8 x i32> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrz.lu.d(<4 x double>)
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define <4 x i64> @lasx_xvftintrz_lu_d(<4 x double> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrz_lu_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrz.lu.d $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrz.lu.d(<4 x double> %va)
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ret <4 x i64> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftint.wu.s(<8 x float>)
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define <8 x i32> @lasx_xvftint_wu_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftint_wu_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftint.wu.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftint.wu.s(<8 x float> %va)
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ret <8 x i32> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftint.lu.d(<4 x double>)
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define <4 x i64> @lasx_xvftint_lu_d(<4 x double> %va) nounwind {
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; CHECK-LABEL: lasx_xvftint_lu_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftint.lu.d $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftint.lu.d(<4 x double> %va)
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ret <4 x i64> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftintrne.w.d(<4 x double>, <4 x double>)
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define <8 x i32> @lasx_xvftintrne_w_d(<4 x double> %va, <4 x double> %vb) nounwind {
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; CHECK-LABEL: lasx_xvftintrne_w_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrne.w.d $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftintrne.w.d(<4 x double> %va, <4 x double> %vb)
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ret <8 x i32> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftintrz.w.d(<4 x double>, <4 x double>)
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define <8 x i32> @lasx_xvftintrz_w_d(<4 x double> %va, <4 x double> %vb) nounwind {
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; CHECK-LABEL: lasx_xvftintrz_w_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrz.w.d $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftintrz.w.d(<4 x double> %va, <4 x double> %vb)
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ret <8 x i32> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftintrp.w.d(<4 x double>, <4 x double>)
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define <8 x i32> @lasx_xvftintrp_w_d(<4 x double> %va, <4 x double> %vb) nounwind {
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; CHECK-LABEL: lasx_xvftintrp_w_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrp.w.d $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftintrp.w.d(<4 x double> %va, <4 x double> %vb)
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ret <8 x i32> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftintrm.w.d(<4 x double>, <4 x double>)
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define <8 x i32> @lasx_xvftintrm_w_d(<4 x double> %va, <4 x double> %vb) nounwind {
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; CHECK-LABEL: lasx_xvftintrm_w_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrm.w.d $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftintrm.w.d(<4 x double> %va, <4 x double> %vb)
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ret <8 x i32> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvftint.w.d(<4 x double>, <4 x double>)
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define <8 x i32> @lasx_xvftint_w_d(<4 x double> %va, <4 x double> %vb) nounwind {
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; CHECK-LABEL: lasx_xvftint_w_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftint.w.d $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvftint.w.d(<4 x double> %va, <4 x double> %vb)
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ret <8 x i32> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrnel.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftintrnel_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrnel_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrnel.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrnel.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrneh.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftintrneh_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrneh_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrneh.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrneh.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrzl.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftintrzl_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrzl_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrzl.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrzl.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrzh.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftintrzh_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrzh_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrzh.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrzh.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrpl.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftintrpl_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrpl_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrpl.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrpl.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrph.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftintrph_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrph_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrph.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrph.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrml.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftintrml_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrml_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrml.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrml.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintrmh.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftintrmh_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintrmh_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintrmh.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintrmh.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftintl.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftintl_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftintl_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftintl.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftintl.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvftinth.l.s(<8 x float>)
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define <4 x i64> @lasx_xvftinth_l_s(<8 x float> %va) nounwind {
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; CHECK-LABEL: lasx_xvftinth_l_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvftinth.l.s $xr0, $xr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvftinth.l.s(<8 x float> %va)
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ret <4 x i64> %res
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}
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