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TheRock/compiler/amd-llvm/llvm/test/CodeGen/LoongArch/lasx/intrinsic-sle.ll
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LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
declare <32 x i8> @llvm.loongarch.lasx.xvsle.b(<32 x i8>, <32 x i8>)
define <32 x i8> @lasx_xvsle_b(<32 x i8> %va, <32 x i8> %vb) nounwind {
; CHECK-LABEL: lasx_xvsle_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvsle.b $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvsle.b(<32 x i8> %va, <32 x i8> %vb)
ret <32 x i8> %res
}
declare <16 x i16> @llvm.loongarch.lasx.xvsle.h(<16 x i16>, <16 x i16>)
define <16 x i16> @lasx_xvsle_h(<16 x i16> %va, <16 x i16> %vb) nounwind {
; CHECK-LABEL: lasx_xvsle_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvsle.h $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvsle.h(<16 x i16> %va, <16 x i16> %vb)
ret <16 x i16> %res
}
declare <8 x i32> @llvm.loongarch.lasx.xvsle.w(<8 x i32>, <8 x i32>)
define <8 x i32> @lasx_xvsle_w(<8 x i32> %va, <8 x i32> %vb) nounwind {
; CHECK-LABEL: lasx_xvsle_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvsle.w $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvsle.w(<8 x i32> %va, <8 x i32> %vb)
ret <8 x i32> %res
}
declare <4 x i64> @llvm.loongarch.lasx.xvsle.d(<4 x i64>, <4 x i64>)
define <4 x i64> @lasx_xvsle_d(<4 x i64> %va, <4 x i64> %vb) nounwind {
; CHECK-LABEL: lasx_xvsle_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvsle.d $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvsle.d(<4 x i64> %va, <4 x i64> %vb)
ret <4 x i64> %res
}
declare <32 x i8> @llvm.loongarch.lasx.xvslei.b(<32 x i8>, i32)
define <32 x i8> @lasx_xvslei_b(<32 x i8> %va) nounwind {
; CHECK-LABEL: lasx_xvslei_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvslei.b $xr0, $xr0, 1
; CHECK-NEXT: ret
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvslei.b(<32 x i8> %va, i32 1)
ret <32 x i8> %res
}
declare <16 x i16> @llvm.loongarch.lasx.xvslei.h(<16 x i16>, i32)
define <16 x i16> @lasx_xvslei_h(<16 x i16> %va) nounwind {
; CHECK-LABEL: lasx_xvslei_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvslei.h $xr0, $xr0, 1
; CHECK-NEXT: ret
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvslei.h(<16 x i16> %va, i32 1)
ret <16 x i16> %res
}
declare <8 x i32> @llvm.loongarch.lasx.xvslei.w(<8 x i32>, i32)
define <8 x i32> @lasx_xvslei_w(<8 x i32> %va) nounwind {
; CHECK-LABEL: lasx_xvslei_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvslei.w $xr0, $xr0, 1
; CHECK-NEXT: ret
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvslei.w(<8 x i32> %va, i32 1)
ret <8 x i32> %res
}
declare <4 x i64> @llvm.loongarch.lasx.xvslei.d(<4 x i64>, i32)
define <4 x i64> @lasx_xvslei_d(<4 x i64> %va) nounwind {
; CHECK-LABEL: lasx_xvslei_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvslei.d $xr0, $xr0, 1
; CHECK-NEXT: ret
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvslei.d(<4 x i64> %va, i32 1)
ret <4 x i64> %res
}
declare <32 x i8> @llvm.loongarch.lasx.xvsle.bu(<32 x i8>, <32 x i8>)
define <32 x i8> @lasx_xvsle_bu(<32 x i8> %va, <32 x i8> %vb) nounwind {
; CHECK-LABEL: lasx_xvsle_bu:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvsle.bu $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvsle.bu(<32 x i8> %va, <32 x i8> %vb)
ret <32 x i8> %res
}
declare <16 x i16> @llvm.loongarch.lasx.xvsle.hu(<16 x i16>, <16 x i16>)
define <16 x i16> @lasx_xvsle_hu(<16 x i16> %va, <16 x i16> %vb) nounwind {
; CHECK-LABEL: lasx_xvsle_hu:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvsle.hu $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvsle.hu(<16 x i16> %va, <16 x i16> %vb)
ret <16 x i16> %res
}
declare <8 x i32> @llvm.loongarch.lasx.xvsle.wu(<8 x i32>, <8 x i32>)
define <8 x i32> @lasx_xvsle_wu(<8 x i32> %va, <8 x i32> %vb) nounwind {
; CHECK-LABEL: lasx_xvsle_wu:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvsle.wu $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvsle.wu(<8 x i32> %va, <8 x i32> %vb)
ret <8 x i32> %res
}
declare <4 x i64> @llvm.loongarch.lasx.xvsle.du(<4 x i64>, <4 x i64>)
define <4 x i64> @lasx_xvsle_du(<4 x i64> %va, <4 x i64> %vb) nounwind {
; CHECK-LABEL: lasx_xvsle_du:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvsle.du $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvsle.du(<4 x i64> %va, <4 x i64> %vb)
ret <4 x i64> %res
}
declare <32 x i8> @llvm.loongarch.lasx.xvslei.bu(<32 x i8>, i32)
define <32 x i8> @lasx_xvslei_bu(<32 x i8> %va) nounwind {
; CHECK-LABEL: lasx_xvslei_bu:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvslei.bu $xr0, $xr0, 1
; CHECK-NEXT: ret
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvslei.bu(<32 x i8> %va, i32 1)
ret <32 x i8> %res
}
declare <16 x i16> @llvm.loongarch.lasx.xvslei.hu(<16 x i16>, i32)
define <16 x i16> @lasx_xvslei_hu(<16 x i16> %va) nounwind {
; CHECK-LABEL: lasx_xvslei_hu:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvslei.hu $xr0, $xr0, 1
; CHECK-NEXT: ret
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvslei.hu(<16 x i16> %va, i32 1)
ret <16 x i16> %res
}
declare <8 x i32> @llvm.loongarch.lasx.xvslei.wu(<8 x i32>, i32)
define <8 x i32> @lasx_xvslei_wu(<8 x i32> %va) nounwind {
; CHECK-LABEL: lasx_xvslei_wu:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvslei.wu $xr0, $xr0, 1
; CHECK-NEXT: ret
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvslei.wu(<8 x i32> %va, i32 1)
ret <8 x i32> %res
}
declare <4 x i64> @llvm.loongarch.lasx.xvslei.du(<4 x i64>, i32)
define <4 x i64> @lasx_xvslei_du(<4 x i64> %va) nounwind {
; CHECK-LABEL: lasx_xvslei_du:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvslei.du $xr0, $xr0, 1
; CHECK-NEXT: ret
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvslei.du(<4 x i64> %va, i32 1)
ret <4 x i64> %res
}
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