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TheRock/compiler/amd-llvm/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/adda.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

92 lines
3.2 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
define void @vadda_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vadda_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvadda.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%va = load <32 x i8>, ptr %a
%vb = load <32 x i8>, ptr %b
%conda = icmp slt <32 x i8> %va, zeroinitializer
%nega = sub <32 x i8> zeroinitializer, %va
%absa = select <32 x i1> %conda, <32 x i8> %nega, <32 x i8> %va
%condb = icmp slt <32 x i8> %vb, zeroinitializer
%negb = sub <32 x i8> zeroinitializer, %vb
%absb = select <32 x i1> %condb, <32 x i8> %negb, <32 x i8> %vb
%add = add <32 x i8> %absa, %absb
store <32 x i8> %add, ptr %res
ret void
}
define void @vadda_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vadda_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvadda.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%va = load <16 x i16>, ptr %a
%vb = load <16 x i16>, ptr %b
%conda = icmp slt <16 x i16> %va, zeroinitializer
%nega = sub <16 x i16> zeroinitializer, %va
%absa = select <16 x i1> %conda, <16 x i16> %nega, <16 x i16> %va
%condb = icmp slt <16 x i16> %vb, zeroinitializer
%negb = sub <16 x i16> zeroinitializer, %vb
%absb = select <16 x i1> %condb, <16 x i16> %negb, <16 x i16> %vb
%add = add <16 x i16> %absa, %absb
store <16 x i16> %add, ptr %res
ret void
}
define void @vadda_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vadda_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvadda.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%va = load <8 x i32>, ptr %a
%vb = load <8 x i32>, ptr %b
%conda = icmp slt <8 x i32> %va, zeroinitializer
%nega = sub <8 x i32> zeroinitializer, %va
%absa = select <8 x i1> %conda, <8 x i32> %nega, <8 x i32> %va
%condb = icmp slt <8 x i32> %vb, zeroinitializer
%negb = sub <8 x i32> zeroinitializer, %vb
%absb = select <8 x i1> %condb, <8 x i32> %negb, <8 x i32> %vb
%add = add <8 x i32> %absa, %absb
store <8 x i32> %add, ptr %res
ret void
}
define void @vadda_d(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vadda_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvadda.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%va = load <4 x i64>, ptr %a
%vb = load <4 x i64>, ptr %b
%conda = icmp slt <4 x i64> %va, zeroinitializer
%nega = sub <4 x i64> zeroinitializer, %va
%absa = select <4 x i1> %conda, <4 x i64> %nega, <4 x i64> %va
%condb = icmp slt <4 x i64> %vb, zeroinitializer
%negb = sub <4 x i64> zeroinitializer, %vb
%absb = select <4 x i1> %condb, <4 x i64> %negb, <4 x i64> %vb
%add = add <4 x i64> %absa, %absb
store <4 x i64> %add, ptr %res
ret void
}