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TheRock/compiler/amd-llvm/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fdiv.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

73 lines
2.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
define void @fdiv_v8f32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fdiv_v8f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvfdiv.s $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%v0 = load <8 x float>, ptr %a0
%v1 = load <8 x float>, ptr %a1
%v2 = fdiv <8 x float> %v0, %v1
store <8 x float> %v2, ptr %res
ret void
}
define void @fdiv_v4f64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fdiv_v4f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvfdiv.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%v0 = load <4 x double>, ptr %a0
%v1 = load <4 x double>, ptr %a1
%v2 = fdiv <4 x double> %v0, %v1
store <4 x double> %v2, ptr %res
ret void
}
;; 1.0 / vec
define void @one_fdiv_v8f32(ptr %res, ptr %a0) nounwind {
; CHECK-LABEL: one_fdiv_v8f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvfrecip.s $xr0, $xr0
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%v0 = load <8 x float>, ptr %a0
%div = fdiv <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %v0
store <8 x float> %div, ptr %res
ret void
}
define void @one_fdiv_v4f64(ptr %res, ptr %a0) nounwind {
; LA32-LABEL: one_fdiv_v4f64:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xvld $xr0, $a1, 0
; LA32-NEXT: xvldi $xr1, -912
; LA32-NEXT: xvfdiv.d $xr0, $xr1, $xr0
; LA32-NEXT: xvst $xr0, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: one_fdiv_v4f64:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xvld $xr0, $a1, 0
; LA64-NEXT: xvfrecip.d $xr0, $xr0
; LA64-NEXT: xvst $xr0, $a0, 0
; LA64-NEXT: ret
entry:
%v0 = load <4 x double>, ptr %a0
%div = fdiv <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, %v0
store <4 x double> %div, ptr %res
ret void
}