derek.holloway
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67 lines
2.2 KiB
LLVM
67 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK
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; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK
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;; fptrunc
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define void @fptrunc_v4f64_to_v4f32(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: fptrunc_v4f64_to_v4f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvpermi.q $xr1, $xr0, 1
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; CHECK-NEXT: vfcvt.s.d $vr0, $vr1, $vr0
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x double>, ptr %a0
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%trunc = fptrunc <4 x double> %v0 to <4 x float>
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store <4 x float> %trunc, ptr %res
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ret void
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}
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define void @fptrunc_v8f64_to_v8f32(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: fptrunc_v8f64_to_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvld $xr1, $a1, 32
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; CHECK-NEXT: xvfcvt.s.d $xr0, $xr1, $xr0
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; CHECK-NEXT: xvpermi.d $xr0, $xr0, 216
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <8 x double>, ptr %a0
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%trunc = fptrunc <8 x double> %v0 to <8 x float>
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store <8 x float> %trunc, ptr %res
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ret void
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}
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define void @fptrunc_concat_bitcast(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: fptrunc_concat_bitcast:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvld $xr1, $a1, 32
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; CHECK-NEXT: xvfcvt.s.d $xr0, $xr1, $xr0
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; CHECK-NEXT: xvpermi.d $xr0, $xr0, 216
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%x = load <8 x double>, ptr %a0
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; split to 2 x <4 x double>
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%lo = shufflevector <8 x double> %x, <8 x double> poison,
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<4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%hi = shufflevector <8 x double> %x, <8 x double> poison,
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<4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%r0 = fptrunc <4 x double> %lo to <4 x float>
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%r1 = fptrunc <4 x double> %hi to <4 x float>
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%i0 = bitcast <4 x float> %r0 to <2 x i64>
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%i1 = bitcast <4 x float> %r1 to <2 x i64>
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; concat as integer vector
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%cat = shufflevector <2 x i64> %i0, <2 x i64> %i1,
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<4 x i32> <i32 0, i32 1, i32 2, i32 3>
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store <4 x i64> %cat, ptr %res
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ret void
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}
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