derek.holloway
7502bf64a4
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45 lines
1.5 KiB
LLVM
45 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
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; RUN: llc -mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s
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define <32 x i8> @xvssub_b(<32 x i8> %a, <32 x i8> %b) {
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; CHECK-LABEL: xvssub_b:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvssub.b $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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%ret = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> %a, <32 x i8> %b)
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ret <32 x i8> %ret
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}
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define <16 x i16> @xvssub_h(<16 x i16> %a, <16 x i16> %b) {
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; CHECK-LABEL: xvssub_h:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvssub.h $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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%ret = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> %a, <16 x i16> %b)
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ret <16 x i16> %ret
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}
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define <8 x i32> @xvssub_w(<8 x i32> %a, <8 x i32> %b) {
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; CHECK-LABEL: xvssub_w:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvssub.w $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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%ret = call <8 x i32> @llvm.ssub.sat.v8i32(<8 x i32> %a, <8 x i32> %b)
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ret <8 x i32> %ret
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}
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define <4 x i64> @xvssub_d(<4 x i64> %a, <4 x i64> %b) {
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; CHECK-LABEL: xvssub_d:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvssub.d $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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%ret = call <4 x i64> @llvm.ssub.sat.v4i64(<4 x i64> %a, <4 x i64> %b)
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ret <4 x i64> %ret
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}
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declare <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8>, <32 x i8>)
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declare <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16>, <16 x i16>)
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declare <8 x i32> @llvm.ssub.sat.v8i32(<8 x i32>, <8 x i32>)
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declare <4 x i64> @llvm.ssub.sat.v4i64(<4 x i64>, <4 x i64>)
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