derek.holloway
7502bf64a4
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173 lines
5.3 KiB
LLVM
173 lines
5.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 -mattr=+32s,+lsx < %s | FileCheck %s
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; RUN: llc --mtriple=loongarch64 -mattr=+lsx < %s | FileCheck %s
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define void @ctpop_v16i8(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: ctpop_v16i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vpcnt.b $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <16 x i8>, ptr %src
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%res = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %v)
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store <16 x i8> %res, ptr %dst
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ret void
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}
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define void @ctpop_v8i16(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: ctpop_v8i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vpcnt.h $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <8 x i16>, ptr %src
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%res = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %v)
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store <8 x i16> %res, ptr %dst
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ret void
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}
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define void @ctpop_v4i32(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: ctpop_v4i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vpcnt.w $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <4 x i32>, ptr %src
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%res = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %v)
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store <4 x i32> %res, ptr %dst
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ret void
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}
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define void @ctpop_v2i64(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: ctpop_v2i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vpcnt.d $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <2 x i64>, ptr %src
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%res = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %v)
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store <2 x i64> %res, ptr %dst
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ret void
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}
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define void @ctlz_v16i8(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: ctlz_v16i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vclz.b $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <16 x i8>, ptr %src
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%res = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %v, i1 false)
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store <16 x i8> %res, ptr %dst
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ret void
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}
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define void @ctlz_v8i16(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: ctlz_v8i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vclz.h $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <8 x i16>, ptr %src
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%res = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %v, i1 false)
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store <8 x i16> %res, ptr %dst
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ret void
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}
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define void @ctlz_v4i32(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: ctlz_v4i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vclz.w $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <4 x i32>, ptr %src
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%res = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %v, i1 false)
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store <4 x i32> %res, ptr %dst
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ret void
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}
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define void @ctlz_v2i64(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: ctlz_v2i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vclz.d $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <2 x i64>, ptr %src
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%res = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %v, i1 false)
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store <2 x i64> %res, ptr %dst
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ret void
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}
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define void @not_ctlz_v16i8(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: not_ctlz_v16i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vclo.b $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <16 x i8>, ptr %src
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%neg = xor <16 x i8> %v, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
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%res = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %neg, i1 false)
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store <16 x i8> %res, ptr %dst
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ret void
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}
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define void @not_ctlz_v8i16(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: not_ctlz_v8i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vclo.h $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <8 x i16>, ptr %src
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%neg = xor <8 x i16> %v, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
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%res = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %neg, i1 false)
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store <8 x i16> %res, ptr %dst
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ret void
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}
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define void @not_ctlz_v4i32(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: not_ctlz_v4i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vclo.w $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <4 x i32>, ptr %src
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%neg = xor <4 x i32> %v, <i32 -1, i32 -1, i32 -1, i32 -1>
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%res = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %neg, i1 false)
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store <4 x i32> %res, ptr %dst
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ret void
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}
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define void @not_ctlz_v2i64(ptr %src, ptr %dst) nounwind {
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; CHECK-LABEL: not_ctlz_v2i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vld $vr0, $a0, 0
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; CHECK-NEXT: vclo.d $vr0, $vr0
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; CHECK-NEXT: vst $vr0, $a1, 0
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; CHECK-NEXT: ret
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%v = load <2 x i64>, ptr %src
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%neg = xor <2 x i64> %v, <i64 -1, i64 -1>
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%res = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %neg, i1 false)
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store <2 x i64> %res, ptr %dst
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ret void
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}
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declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>)
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declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>)
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declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>)
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declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
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declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1)
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declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1)
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declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1)
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declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
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