derek.holloway
7502bf64a4
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122 lines
4.0 KiB
LLVM
122 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx,-frecipe < %s | FileCheck %s --check-prefixes=FAULT,FAULT-LA32
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx,+frecipe < %s | FileCheck %s
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; RUN: llc --mtriple=loongarch64 --mattr=+lsx,-frecipe < %s | FileCheck %s --check-prefixes=FAULT,FAULT-LA64
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; RUN: llc --mtriple=loongarch64 --mattr=+lsx,+frecipe < %s | FileCheck %s
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define void @fdiv_v4f32(ptr %res, ptr %a0, ptr %a1) nounwind {
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; FAULT-LABEL: fdiv_v4f32:
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; FAULT: # %bb.0: # %entry
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; FAULT-NEXT: vld $vr0, $a1, 0
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; FAULT-NEXT: vld $vr1, $a2, 0
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; FAULT-NEXT: vfdiv.s $vr0, $vr0, $vr1
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; FAULT-NEXT: vst $vr0, $a0, 0
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; FAULT-NEXT: ret
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;
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; CHECK-LABEL: fdiv_v4f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a2, 0
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; CHECK-NEXT: vld $vr1, $a1, 0
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; CHECK-NEXT: vfrecipe.s $vr2, $vr0
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; CHECK-NEXT: vfmul.s $vr3, $vr1, $vr2
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; CHECK-NEXT: vfnmsub.s $vr0, $vr0, $vr3, $vr1
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; CHECK-NEXT: vfmadd.s $vr0, $vr2, $vr0, $vr3
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x float>, ptr %a0
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%v1 = load <4 x float>, ptr %a1
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%v2 = fdiv fast <4 x float> %v0, %v1
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store <4 x float> %v2, ptr %res
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ret void
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}
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define void @fdiv_v2f64(ptr %res, ptr %a0, ptr %a1) nounwind {
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; FAULT-LABEL: fdiv_v2f64:
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; FAULT: # %bb.0: # %entry
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; FAULT-NEXT: vld $vr0, $a1, 0
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; FAULT-NEXT: vld $vr1, $a2, 0
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; FAULT-NEXT: vfdiv.d $vr0, $vr0, $vr1
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; FAULT-NEXT: vst $vr0, $a0, 0
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; FAULT-NEXT: ret
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;
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; CHECK-LABEL: fdiv_v2f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a2, 0
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; CHECK-NEXT: vld $vr1, $a1, 0
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; CHECK-NEXT: vfrecipe.d $vr2, $vr0
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; CHECK-NEXT: vldi $vr3, -784
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; CHECK-NEXT: vfmadd.d $vr3, $vr0, $vr2, $vr3
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; CHECK-NEXT: vfnmsub.d $vr2, $vr3, $vr2, $vr2
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; CHECK-NEXT: vfmul.d $vr3, $vr1, $vr2
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; CHECK-NEXT: vfnmsub.d $vr0, $vr0, $vr3, $vr1
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; CHECK-NEXT: vfmadd.d $vr0, $vr2, $vr0, $vr3
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <2 x double>, ptr %a0
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%v1 = load <2 x double>, ptr %a1
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%v2 = fdiv fast <2 x double> %v0, %v1
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store <2 x double> %v2, ptr %res
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ret void
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}
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;; 1.0 / vec
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define void @one_fdiv_v4f32(ptr %res, ptr %a0) nounwind {
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; FAULT-LABEL: one_fdiv_v4f32:
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; FAULT: # %bb.0: # %entry
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; FAULT-NEXT: vld $vr0, $a1, 0
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; FAULT-NEXT: vfrecip.s $vr0, $vr0
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; FAULT-NEXT: vst $vr0, $a0, 0
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; FAULT-NEXT: ret
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;
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; CHECK-LABEL: one_fdiv_v4f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a1, 0
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; CHECK-NEXT: vfrecipe.s $vr1, $vr0
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; CHECK-NEXT: vldi $vr2, -1296
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; CHECK-NEXT: vfmadd.s $vr0, $vr0, $vr1, $vr2
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; CHECK-NEXT: vfnmsub.s $vr0, $vr0, $vr1, $vr1
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x float>, ptr %a0
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%div = fdiv fast <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %v0
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store <4 x float> %div, ptr %res
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ret void
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}
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define void @one_fdiv_v2f64(ptr %res, ptr %a0) nounwind {
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; FAULT-LA32-LABEL: one_fdiv_v2f64:
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; FAULT-LA32: # %bb.0: # %entry
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; FAULT-LA32-NEXT: vld $vr0, $a1, 0
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; FAULT-LA32-NEXT: vldi $vr1, -912
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; FAULT-LA32-NEXT: vfdiv.d $vr0, $vr1, $vr0
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; FAULT-LA32-NEXT: vst $vr0, $a0, 0
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; FAULT-LA32-NEXT: ret
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;
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; CHECK-LABEL: one_fdiv_v2f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a1, 0
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; CHECK-NEXT: vfrecipe.d $vr1, $vr0
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; CHECK-NEXT: vldi $vr2, -912
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; CHECK-NEXT: vfnmsub.d $vr3, $vr0, $vr1, $vr2
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; CHECK-NEXT: vfmadd.d $vr1, $vr1, $vr3, $vr1
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; CHECK-NEXT: vfnmsub.d $vr0, $vr0, $vr1, $vr2
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; CHECK-NEXT: vfmadd.d $vr0, $vr1, $vr0, $vr1
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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;
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; FAULT-LA64-LABEL: one_fdiv_v2f64:
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; FAULT-LA64: # %bb.0: # %entry
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; FAULT-LA64-NEXT: vld $vr0, $a1, 0
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; FAULT-LA64-NEXT: vfrecip.d $vr0, $vr0
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; FAULT-LA64-NEXT: vst $vr0, $a0, 0
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; FAULT-LA64-NEXT: ret
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entry:
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%v0 = load <2 x double>, ptr %a0
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%div = fdiv fast <2 x double> <double 1.0, double 1.0>, %v0
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store <2 x double> %div, ptr %res
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ret void
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}
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